G5421C Global Mixed-mode Technology High Performance 6A Integrated Power Stage Features General Description Integrated 18m at VCC=5V N-Channel G5421C is a 6A, power stage with integrated 20m MOSFET for Low Side N-channel high-side MOSFET and 18m N-channel Integrated 20m at VCC=5V N-Channel low-side MOSFET. It includes a tri-state PWM input MOSFET for High Side function. When the PWM input signal stays tri-state, VCC Power-On-Reset Feature Integrated the tri-state function turns off the high-side MOSFET Adjustable Over-Current Protection Threshold and low-side MOSFET. The Power-On-Reset (POR) Tri-State PWM Input Function circuit with hysteresis monitors VCC to start up or shut EN Timing Control Function down the IC. The over-current protection function Adaptive Shoot-Through Protection monitors the output current without the current sensing Skip Mode Operation resistor that achieves high efficiency and low cost. It Over Temperature Protection can be enabled by OCEN pin. The skip mode opera- tion is activated by SMOD pin. The G5421C is availa- Applications ble in QFN4X4-23 package. Wireless Charging Notebook Computers I/O Supply Chipset/RAM Supply as Low as 0.8V Networking Power Supply Ordering Information ORDER TEMP. PACKAGE MARKING NUMBER RANGE (Green) G5421CQT1U 5421C -40C to +85C QFN4X4-23 Note: QT: QFN4X4-23 1: Bonding Code U : Tape & Reel Green: Lead Free / Halogen Free Pin Configuration 1 OCSET 17 LX 24 25 2 16 LX OCEN EN 3 15 PGND LX VIN SMOD 4 14 PGND 5 AGND 13 PGND PWM 12 6 PGND G5421C QFN4X4-23 Note: Recommend connecting the Thermal Pad to the Ground for excellent power dissipation. Ver: 0.5 May 03, 2018 1 NC 23 VCC 7 VIN VIN 8 22 21 PVCC VIN 9 BST 20 LX 10 19 PGND LX LX 11 18 G5421C Global Mixed-mode Technology Absolute Maximum Ratings Thermal Resistance of Junction to Ambient, ( ) VIN to AGND . . . . . . . . . . . . . . . . . -0.3V to 30V JA VCC to AGND . . . . . . . . . . . . . . . . . -0.3V to 6V QFN4X4-23 . . . . . . . . . . . . . . .. . . . . . . . . . . 25C/W PVCC to AGND . . . . . . . . . . . . . . . . . -0.3V to 6V Junction Temperature . . . . . . . . . . . . . . . . . . . . .150C EN, SMOD, OCSET, PWM to AGND . . . . -0.3V to 6V Storage Temperature . . . . . . . . . . . . . -65C to 150C BST to PGND . . . . . . . . . . . . . . . . . . . . . .-0.3V to 35V Reflow Temperature (soldering, 10sec) . . . . . . 300C LX to BST. . . . . . . . . . . . . . . . . . . . . . . . . . -6V to 0.3V Electrical Characteristics (VIN=12V, VCC=5V, PVCC=5V, EN=5V, T =25C) A The device is not guaranteed to function outside its operating conditions. Parameters with MIN and/or MAX limits are 100% tested at +25C, unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAXUNITS VIN Input Voltage Range VIN 4.5 --- 25 V VCC Input Voltage Range VCC 4.5 5 5.5 V EN=High, PWM=Low, SMOD=Low, OCEN=High --- 240 270 A Quiescent Supply Current (VCC) EN=High, PWM=Low, SMOD=High, OCEN=Low --- 90 120 A Shutdown Current (VCC) EN=Low --- --- 1 A VCC Rising POR Threshold 3.7 4.0 4.3 V VCC POR Hysteresis --- 200 --- mV Zero Current Detect LX - PGND -10 --- 5 mV OCSET Current Source 9 10 11 A Thermal Shutdown Threshold Hysteresis=45C --- 145 --- C High Side Switch Resistance BST - LX forced to 5V, VCC=5V --- 20 --- m Low Side Switch Resistance VCC=5V --- 18 --- m PWM Rising (V) 3.3 3.6 3.9 V TH PWM R PWM Input Logic Threshold PWM Falling (V) 0.8 1.1 1.4 V TH PWM F PWM Rising (V) 1.0 1.3 1.6 V TH TRI R Tri-state Input Rising Logic Threshold Hysteresis --- 200 --- mV PWM Falling (V) 3.1 3.4 3.7 V TH TRI F Tri-state Input Falling Logic Threshold Hysteresis --- 200 --- mV Logic Input High Voltage EN, SMOD, OCEN 2.0 --- --- V Logic Input Low Voltage EN, SMOD, OCEN --- --- 0.8 V Tri-state Hold Off Time t --- 150 --- ns TSHO Tri-state to High/Low Side (t ) PWM Tri-state to High/Low to DH/DL Low to High --- 20 --- ns PD TRI R PWM to High side Gate (t ) PWM High to Low to DH High to Low --- 20 --- ns PD OFF DH PWM to Low side Gate (t ) PWM Low to High to DL High to Low --- 20 --- ns PD OFF DL Low to High side Gate Deadtime DL High to Low to DH Low to High --- 20 --- ns (t ) PD ON DH High to Low side Gate Deadtime DH High to Low to DL Low to High --- 20 --- ns (t ) PD ON DL Ver: 0.5 May 03, 2018 2