Product brief Intel FPGA SDK for OpenCL The need for higher processing Figure 1: Intel FPGA SDK for OpenCL Use Model requirements is growing at rapid rates and as a result heterogeneous computing is becoming standard as TM OpenCL Accelerator Code companies look to more efficiently Host Code solve larger problems or ones that were main() kernel void sum read data( ) previously unsolvable. The need for ( global float *a, manipulate( ) global float *b, heterogeneous computing is leading to clEnqueueWriteBuffer( ) global float *y) clEnqueueNDRange(,sum,) standard programming languages to clEnqueueReadBuffer( ) int gid = get global id(0) display result( ) exploit the different acceleration y gid = a gid + b gid hardware of which Open Computing Language (OpenCL) is the most Standard Intel FPGA Verilog gcc Offline popular. OpenCL provides a Compiler Compiler standardized structure for writing programs that can be implemented across heterogeneous platforms, that EXE AOCX include central processing units (CPUs), graphic processing units (GPUs), digital signal processors (DSPs), and field-programmable gate arrays (FPGAs). Accelerator OpenCL is a low-level programming Host language derived from C that includes an application programming interface (API) framework for communicating between a host and accelerator kernels (see Figure 1) written in OpenCL and language constructs for parallel The SDK provides a software familiar Figure 2: Accelerator Development Flow computing using task-based and development environment where the data-based parallelism. The standard is user emulates their OpenCL kernels in managed by the Khronos Group of seconds to validate its functionality and which Altera is a contributing member is then given specific insight into the Modify Kernel and OpenCL conformant company. bottlenecks with a detailed optimization report. A profiler is also available and The Intel FPGA SDK for OpenCL allows can be used to examine the system Emulator a user to abstract away the traditional performance to get direct insight into hardware FPGA development flow the architectural bottlenecks of the Optimization bringing the inherently parallel and design. The greatest benefit with the flexible architecture of the FPGA to the Intel FPGA SDK for OpenCL is that code software developer with a much faster written and optimized for the FPGA Profiler and higher level software development today can be reused across the various flow (see Figure 2). The FPGA FPGA families or future generations effectively creates custom hardware for of FPGAs, without the need for Optimizing FPGA Build each instruction being accelerated, modifications to the code while providing a much more power efficient still leveraging the performance use of the hardware than that of the enhancements of the newer CPU or GPU architecture would allow. architecture. OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission by Khronos.OpenCL is being used today on FPGAs in a variety of applications ranging from machine learning to perform object detection and recognition, genomics, software-defined networking, internet search engine acceleration, cloud acceleration, and much more. The key benefits for software developers and system designers to use Intel FPGAs SDK for OpenCL are: Performance: for many applications the FPGA provides far superior performance than competing acceleration technology Efficiency: the FPGA has a massively parallel fine-grained architecture that is leveraged to create a custom hardware accelerator based on the specific code written with an average of one fifth the power of competing accelerators Ease of use: follows a traditional software development environment Code reuse: performance improvements between families and generations of FPGAs can be leveraged without modifications to the original OpenCL code Heterogeneous systems: with OpenCL, you can develop kernels that target FPGAs, CPUs, GPUs, and DSPs seamlessly to partition your design that targets the appropriate accelerator Code profiling: dynamic program analysis of system and memory performance To learn more about OpenCL, visit us at www.altera.com/opencl. Need a board to start developing with Contact one of our board partners: Need help with your OpenCL code Contact one of our development partners: 2016 Intel Corporation. Intel, the Intel logo, Altera, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. Other marks and brands may be claimed as the property of others. See Trademarks on intel.com for full list of Intel trademarks or the Trademarks & Brands Names Database. Gen-1022-1.1 * Other marks and brands may be claimed as the property of others. 2