Product Information

M4A3-32/32-7VNC48

Product Image X-ON

Datasheet
CPLD - Complex Programmable Logic Devices HI PERF E2CMOS PLD
Manufacturer: Lattice



Price (USD)

1: USD 9.702 ea
Line Total: USD 9.702

599 - Global Stock
Ships to you between
Fri. 07 Apr to Thu. 13 Apr
MOQ: 1 Multiples:1
Pack Size :   1
Availability Price Quantity
599 - Global Stock


Ships to you between Fri. 07 Apr to Thu. 13 Apr

MOQ : 1
Multiples : 1
1 : USD 9.702
25 : USD 8.208
100 : USD 7.8338

     
Manufacturer
Lattice
Product Category
CPLD - Complex Programmable Logic Devices
RoHS - XON
Y Icon ROHS
Product
Ispmach 4A
Number of Macrocells
32
Number of Logic Array Blocks - LABs
-
Maximum Operating Frequency
125 MHz
Number of I/Os
145 I/O
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Smd/Smt
Package / Case
TQFP - 44
Memory Type
Eeprom
Packaging
Tray
Series
M4a3 - 32/32 - 7Vn
Brand
Lattice
Number Of Gates
1250
Propagation Delay - Max
5 Ns
Minimum Operating Temperature
0 C
Factory Pack Quantity :
250
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
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ispMACH 4A CPLD Family 2 High Performance E CMOS In-System Programmable Logic FEATURES 2 High-performance, E CMOS 3.3-V & 5-V CPLD families Flexible architecture for rapid logic designs TM Excellent First-Time-Fit and ret feature TM SpeedLocking performance for guaranteed xed timing Central, input and output switch matrices for 100% routability and 100% pin-out retention High speed 5.0ns t Commercial and 7.5ns t Industrial PD PD 182MHz f CNT 32 to 512 macrocells 32 to 768 registers 44 to 388 pins in PLCC, PQFP, TQFP, BGA, fpBGA and caBGA packages Flexible architecture for a wide range of design styles D/T registers and latches Synchronous or asynchronous mode Dedicated input registers Programmable polarity Reset/ preset swapping Advanced capabilities for easy system integration 3.3-V & 5-V JEDEC-compliant operations JTAG (IEEE 1149.1) compliant for boundary scan testing 3.3-V & 5-V JTAG in-system programming PCI compliant (-5/-55/-6/-65/-7/-10/-12 speed grades) Safe for mixed supply voltage system designs TM Programmable pull-up or Bus-Friendly inputs and I/Os Hot-socketing Programmable security bit Individual output slew rate control 2 Advanced E CMOS process provides high-performance, cost-effective solutions Lead-free package options Publication ISPM4A Rev: M Amendment/0 Issue Date: September 2006 Lead- Free Package Options Available Table 1. ispMACH 4A Device Features 3.3 V Devices Feature M4A3-32 M4A3-64 M4A3-96 M4A3-128 M4A3-192 M4A3-256 M4A3-384 M4A3-512 Macrocells 32 64 96 128 192 256 384 512 User I/O options 32 32/64 48 64 96 128/160/192 160/192 160/192/256 t (ns) 5.0 5.5 5.5 5.5 6.0 5.5 6.5 7.5 PD f (MHz) 182 167 167 167 160 167 154 125 CNT t (ns) 4.0 4.0 4.0 4.0 4.5 4.0 4.5 5.5 COS t (ns) 3.0 3.5 3.5 3.5 3.5 3.5 3.5 5.0 SS Static Power (mA) 20 25/52 40 55 85 110/150 149/155 179 JTAG Compliant Yes Yes Yes Yes Yes Yes Yes Yes PCI Compliant Yes Yes Yes Yes Yes Yes Yes Yes 5 V Devices Feature M4A5-32 M4A5-64 M4A5-96 M4A5-128 M4A5-192 M4A5-256 Macrocells 32 64 96 128 192 256 User I/O options 32 32 48 64 96 128 t (ns) 5.0 5.5 5.5 5.5 6.0 6.5 PD f (MHz) 182 167 167 167 160 154 CNT t (ns) 4.0 4.0 4.0 4.0 4.5 5.0 COS t (ns) 3.0 3.5 3.5 3.5 3.5 3.5 SS Static Power (mA) 20 25 40 55 74 110 JTAG Compliant Yes Yes Yes Yes Yes Yes PCI Compliant Yes Yes Yes Yes Yes Yes 2 ispMACH 4A Family

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Monolithic integrated circuits:
LA4
LAT
LATTICE SEMI
Lattice Semiconductor
Lattice Semiconductor Corporation
Vantis