XR16V2751 HIGH PERFORMANCE DUART WITH 64-BYTE FIFO AND POWERSAVE SEPTEMBER 2007 REV. 1.0.1 FEATURES GENERAL DESCRIPTION 2.25 to 3.6 Volt Operation 1 The XR16V2751 (V2751) is a high performance dual 5 Volt Tolerant Inputs universal asynchronous receiver and transmitter (UART) with 64 byte TX and RX FIFOs. The device Pin-to-pin compatible to Exars XR16L2751 in the operates from 2.25 to 3.6 volts with 5 Volt tolerant 48-TQFP package inputs and is pin-to-pin and software compatible to Two independent UART channels Exars XR16L2751. The device includes 2 additional Register set identical to 16L2751 capabilities over the XR16V2750: Intel and Motorola Data rate of up to 8 Mbps at 3.3 V, and data bus selection and a PowerSave mode to 6.25 Mbps at 2.5 V with 8X sampling rate further reduce sleep current to a minimum during sleep mode. It supports the Exars enhanced features Fractional Baud Rate Generator of programmable FIFO trigger level and FIFO level Transmit and Receive FIFOs of 64 bytes counters, automatic hardware (RTS/CTS) and Programmable TX and RX FIFO Trigger Levels software flow control, automatic RS-485 half duplex Transmit and Receive FIFO Level Counters direction control output and a complete modem Automatic Hardware (RTS/CTS) Flow Control interface. An internal loopback capability allows Selectable Auto RTS Flow Control Hysteresis system diagnostics. Independent programmable fractional baud rate generators are provided in each Automatic Software (Xon/Xoff) Flow Control channel to select data rates up to 8 Mbps at 3.3 Volt Automatic RS-485 Half-duplex Direction and 8X sampling clock. The V2751 is available in a Control Output via RTS 48-pin TQFP package. Wireless Infrared (IrDA 1.0) Encoder/Decoder NOTE: 1 Covered by U.S. Patent 5,649,122 and 5,949,787 Automatic sleep mode with wake-up interrupt APPLICATIONS Full modem interface PowerSave Feature reduces sleep current to 15 Portable Appliances A Telecommunication Network Routers Device Identification and Revision Ethernet Network Routers Crystal oscillator (up to 24MHz) or external clock Cellular Data Devices (up to 64MHz) input Factory Automation and Process Controls 48-TQFP package FIGURE 1. XR16V2751 BLOCK DIAGRAM *5 Volt Tolerant Inputs 2.25 to 3.6V VCC PwrSave (Except XTAL1) GND A2:A0 D7:D0 UART Channel A IOR (VCC) TXA, RXA, DTRA , IOW (R/W ) 64 Byte TX FIFO UART DSRA , RTSA , CSA (CS ) Regs IR DTSA , CDA , RIA , TX & RX ENDEC CSB (A3) OP2A BRG INTA (IRQ ) 64 Byte RX FIFO INTB (logic 0) TXB, RXB, DTRB , TXRDYA Intel or UART Channel B DSRB , RTSB , TXRDYB Motorola (same as Channel A) CTSB , CDB , RIB , RXRDYA Data Bus OP2B RXRDYB Interface XTAL1 Reset (Reset ) Crystal Osc/Buffer XTAL2 16/68 CLKSEL HDCNTL Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com XR16V2751 HIGH PERFORMANCE DUART WITH 64-BYTE FIFO AND POWERSAVE FEATURE REV. 1.0.1 FIGURE 2. PIN OUT ASSIGNMENT D5 1 36 RESET D6 2 35 DTRB D7 3 34 DTRA RTSA RXB 4 33 RXA 5 32 OP2A XR16V2751 TXRDYB 6 31 RXRDYA 48-pin TQFP TXA 7 30 INTA in 16 (Intel) Mode TXB 8 29 INTB A0 OP2B 9 28 A1 CSA 10 27 CSB 11 26 A2 PWRSAVE 12 25 CLKSEL RESET D5 1 36 VCC D6 2 35 DTRB D7 3 34 DTRA RXB 4 33 RTSA RXA 5 32 OP2A XR16V2751 TXRDYB 6 31 RXRDYA 48-pin TQFP TXA 7 30 IRQ in 68 (Motorola) Mode TXB 8 29 NC OP2B 9 28 A0 10 27 A1 CS A2 A3 11 26 PWRSAVE 12 25 CLKSEL GND ORDERING INFORMATION PART NUMBER PACKAGE OPERATING TEMPERATURE RANGE DEVICE STATUS XR16V2751IM 48-Lead TQFP -40C to +85C Active 2 XTAL1 48 D4 13 XTAL2 14 47 D3 IOW 15 46 D2 CDB 16 45 D1 GND 17 44 D0 RXRDYB 18 43 TXRDYA IOR 19 42 VCC DSRB 20 41 RIA RIB 40 21 CDA RTSB 39 22 DSRA CTSB 38 CTSA 23 16/68 37 HDCNTL 24 XTAL1 13 48 D4 XTAL2 47 14 D3 R/W 46 D2 15 CDB 45 D1 16 GND 17 44 D0 RXRDYB 18 43 TXRDYA NC 19 42 VCC DSRB 20 41 RIA RIB 21 40 CDA RTSB 22 39 DSRA CTSB 23 38 CTSA 16/68 37 24 HDCNTL