24CS512 2 512-Kbit, 3.4 MHz I C Serial EEPROM with 128-Bit Serial Number and Enhanced Software Write Protection Features Packages 512-Kbit EEPROM: 8-Lead MSOP, PDIP, SOIC, SOIJ, TSSOP, 8-Pad UDFN, 5-Lead SOT-23 and 8-Ball CSP - Internally organized as one 65,536 x 8-bit block - Byte or page writes up to 128 bytes Package Types (not to scale) - Byte or sequential reads within a block - Self-timed write cycle (5 ms maximum) 8-Lead MSOP/PDIP/SOIC/ 2 SOIJ/TSSOP 5-lead SOT-23 High-Speed I C Interface: (Top View) (Top View) - High-Speed mode support for 3.4 MHz A0 1 8 VCC WP SCL 1 5 - Industry standard: 1 MHz, 400 kHz and VSS 100 kHz 2 A1 2 7 WP 4 SDA 3 VCC - Output slope control to eliminate ground A2 3 6 SCL bounce VSS 4 5 SDA - Schmitt Trigger inputs for noise suppression Security Register: 8-Pad UDFN 8-Ball CSP - Preprogrammed 128-bit serial number (Top View) (Top View) - User-programmable, lockable A0 VCC 1 8 VVVCCCC WP A0 128-byte ID page A1 2 7 WP A1 Built-in Error Correction Code (ECC) Logic: SCL A2 3 6 SCL - ECC Status bit via the Configuration register SDA A2 VSS VSS 4 5 SDA 2 I C Manufacturer Identification Function Support Versatile Data Protection Options: - Hardware Write-Protect (WP) pin for full array Pin Function Table data protection Name Function - Enhanced software write protection via the Configuration register A0 Device Address Input Operating Voltage Range of 1.7V to 5.5V A1 Device Address Input Low-Power CMOS Technology: A2 Device Address Input - Write current: 3.0 mA maximum at 5.5V VSS Ground - Read current: 1.0 mA maximum at 5.5V, SDA Serial Data Pin 1MHz SCL Serial Clock Input - Standby current: 1 A at 5.5V High Reliability: WP Write-Protect Pin - More than one million erase/write cycles VCC Supply Voltage - Build-in ECC logic for increased reliability - Data retention: >200 years - ESD protection: >4000V RoHS Compliant Temperature Ranges: - Industrial (I): -40C to +85C 2018 Microchip Technology Inc. Preliminary DS20005769A-page 124CS512 The device also contains a Configuration register, Description which allows the write protection behavior to be config- The Microchip Technology Inc. 24CS512 provides ured for legacy hardware write protection or enhanced 2 C (2-wire) 512 Kbits of Serial EEPROM, utilizing an I software write protection which allows the user to pro- serial interface with 3.4 MHz High-Speed mode capa- tect any of the eight independent 64-Kbit zones. Once bility. The device is organized as 65,536 bytes of 8 bits the desired configuration is set, the Configuration reg- each (64-Kbyte), and is optimized for use in consumer ister can be permanently locked, thereby preventing and industrial applications where reliable and depend- any further changes to the device operation. able nonvolatile memory storage is essential. The For added reliability, the 24CS512 utilizes a built-in 24CS512 allows up to eight devices to share a com- 2 Error Correction Code (ECC) scheme. This scheme mon I C (2-wire) bus and is capable of operation can correct up to one incorrectly read bit within a across a broad voltage range (1.7V to 5.5V). four-byte read out. Additionally, the Configuration reg- The 24CS512 features a 2-Kbit Security register, ister includes a read-only ECC State bit (ECS) that is separate from the 512-Kbit memory array. The first half set when ECC is invoked. of the Security register is read-only and contains a 2 C Manufacturer Identifica- The 24CS512 supports the I factory-programmed, globally unique, 128-bit serial tion (ID) command which will return a unique value for number in the first 16 bytes. The 128-bit serial number is the 24CS512, allowing easy identification within the unique across the entire CS series of Serial EEPROM application. products, and eliminates the time-consuming step of performing and ensuring serialization of a product on a manufacturing line. The 128-bit read-only serial number is followed by an additional 1 Kbit (128bytes) of user-programmable EEPROM. The user-programmable section of the Security register can later be permanently write-protected via a software sequence. System Configuration Using Serial EEPROMs VCC t R(max) R = PUP(max) 0.8473 C L VCC VOL (max) R = VCC PUP(min) IOL SCL SDA WP 2 I C MCU VCC VCC VCC A0 A0 A0 Slave 0 Slave 1 Slave 7 A1 WP A1 WP A1 WP A2 24CSXXX SDA A2 24CSXXX SDA A2 24CSXXX SDA VSS SCL VSS SCL VSS SCL VSS 2018 Microchip Technology Inc. Preliminary DS20005769A-page 2