24LC256T-ISMG Microchip

24AA256/24LC256/24FC256 2 256-Kbit I C Serial EEPROM Device Selection Table Maximum Clock Temperature Part Number VCC Range Available Packages Frequency Ranges (1) 24AA256 1.7V-5.5V 400 kHz I, E CS, MF, MS, P, SN, SM, MNY, ST 24LC256 2.5V-5.5V 400 kHz I, E MF, MS, P, SN, SM, MNY, ST (2) 24FC256 1.7V-5.5V 1 MHz I MF, MS, P, SN, SM, MNY, ST Note 1: 100 kHz for VCC<2.5V. CC<2.5V. 2: 400 kHz for V Features Packages Single Supply with Operation Down to 1.7V for 8-Ball CSP, 8-Lead DFN, 8-Lead MSOP, 24AA256 and 24FC256 Devices, 2.5V for 8-Lead PDIP, 8-Lead SOIC, 8-Lead SOIJ, 24LC256 Devices 8-Lead TDFN and 8-Lead TSSOP Low-Power CMOS Technology: Description - Write current: 3 mA, maximum (1) The Microchip Technology Inc. 24XX256 is a 32K x 8 - Standby current: 1 A maximum (I-temp.) (256-Kbit) Serial Electrically Erasable PROM 2 C Compatible Two-Wire Serial Interface, I (EEPROM), capable of operation across a broad volt- Cascadable up to Eight Devices age range (1.7V to 5.5V). It has been developed for Schmitt Trigger Inputs for Noise Suppression advanced, low-power applications such as personal Output Slope Control to Eliminate Ground Bounce communications or data acquisition. This device also has a page write capability of up to 64 bytes of data. 100 kHz, 400 kHz and 1 MHz Compatibility This device is capable of both random and sequential Page Write Time: 5 ms, maximum reads up to the 256K boundary. Functional address Self-Timed Erase/Write Cycle lines allow up to eight devices on the same bus, for up 64-Byte Page Write Buffer to 2 Mbit address space. Hardware Write-Protect ESD Protection >4000V Note 1: 24XX256 is used in this document as a generic part number for the More than One Million Erase/Write Cycles 24AA256/24LC256/24FC256 devices. Data Retention >200 years Factory Programming Available RoHS Compliant Temperature Ranges: - Industrial (I): -40 C to +85C - Extended (E): -40C to +125 C Automotive AEC-Q100 Qualified Package Types (1) DFN/TDFN MSOP/PDIP SOIC/SOIJ/TSSOP CSP VCC A1 A0 A0 11 88 VCC 1 8 A0 1 8 VCC A0 VCC 1 2 3 A1 22 77 WP A1 2 7 A1 2 7 WP WP WP 45 A2 A2 SCL A2 3 6 SCL 33 66 A2 3 6 SCL 8 6 7 VSS 4 5 SDA VSS 44 55 SDA 4 5 VSS SDA SDA SCL VSS Note 1: Pins A0 and A1 are no connects for the MSOP package only. 1998-2021 Microchip Technology Inc. DS20001203X-page 1 24XX256 24XX256 24XX25624AA256/24LC256/24FC256 Block Diagram A0 A1A2 WP HV Generator I/O Memory EEPROM Control Control XDEC Array Logic Logic Page Latches I/O SCL YDEC SDA VCC VSS Sense Amp. R/W Control DS20001203X-page 2 1998-2021 Microchip Technology Inc.