SAM9XE Series Atmel SMART ARM-based Embedded MCU DATASHEET Description The Atmel SMART SAM9XE microcontroller series is based on the integration of an ARM926EJ-S processor with fast ROM, RAM and Flash, and a wide range of peripherals. The embedded Flash memory can be programmed in-system via the JTAG-ICE interface or via a parallel interface on a production programmer prior to mounting. Built-in lock bits, a security bit and MMU protect the firmware from accidental overwrite and preserve its confidentiality. The SAM9XE series embeds an Ethernet MAC, one USB Device Port, and a USB Host Controller. It also integrates several standard peripherals, including six UARTs, SPI, TWI, Timer Counters, Synchronous Serial Controller, ADC and a MultiMedia/SD Card Interface. The SAM9XE system controller includes a reset controller capable of managing the power-on sequence of the microcontroller and the complete system. Correct device operation can be monitored by a built-in brownout detector and a watchdog running off an integrated RC oscillator. The SAM9XE series architecture includes a 6-layer matrix, allowing a maximum internal bandwidth of six 32-bit buses. It also features an External Bus Interface capable of interfacing with a wide range of memory devices. The pinout and ball-out are fully compatible with the Atmel SMART SAM9260 eMPU with the exception that the pin BMS is replaced by the pin ERASE. SAM9XE Embedded Internal Memories Configuration Device ROM SRAM High-speed Flash SAM9XE128 32 KB 16 KB 128 KB SAM9XE256 32 KB 32 KB 256 KB SAM9XE512 32 KB 32 KB 512 KB Atmel-6254E-ATARM-SAM9XE-Datasheet 20-Nov-15Features Incorporates the ARM926EJ-S ARM Thumb Processor DSP instruction Extensions, ARM Jazelle Technology for Java Acceleration 8 KB Data Cache, 16 KB Instruction Cache, Write Buffer 200 MIPS at 180 MHz Memory Management Unit EmbeddedICE, Debug Communication Channel Support Additional Embedded Memories One 32 KB Internal ROM, Single-cycle Access at Maximum Matrix Speed One 32 KB (SAM9XE256 and SAM9XE512) or 16 KB (SAM9XE128) Internal SRAM, Single-cycle Access at Maximum Matrix Speed Internal High-speed Flash: 128 KB (SAM9XE128), 256 KB (SAM9XE256) or 512 KB (SAM9XE512) organized in 256, 512 or 1024 pages of 512 bytes respectively 128-bit Wide Access Fast Read Time: 45 ns Page Programming Time: 4 ms, Including Page Auto-erase Full Erase Time: 10 ms 10,000 Write Cycles, 10 Years Data Retention, Page Lock Capabilities, Flash Security Bit Enhanced Embedded Flash Controller (EEFC) Interface of the Flash Block with the 32-bit Internal Bus Increases Performance in ARM and Thumb Mode with 128-bit Wide Memory Interface External Bus Interface (EBI) Supports SDRAM, Static Memory, ECC-enabled NAND Flash and CompactFlash USB 2.0 Full Speed (12 Mbit/s) Device Port On-chip Transceiver, 2688-byte Configurable Integrated DPRAM USB 2.0 Full Speed (12 Mbit/s) Host Single Port in 208-pin PQFP Device and Double Port in 217-ball LFBGA Device Single or Dual On-chip Transceivers Integrated FIFOs and Dedicated DMA Channels Ethernet MAC 10/100 Base-T Media Independent Interface (MII) or Reduced Media Independent Interface (RMII) 128-byte FIFOs and Dedicated DMA Channels for Receive and Transmit Image Sensor Interface (ISI) ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate 12-bit Data Interface for Support of High Sensibility Sensors SAV and EAV Synchronization, Preview Path with Scaler, YCbCr Format Bus Matrix Six 32-bit-layer Matrix Remap Command Fully-featured System Controller, including Reset Controller (RSTC), Shutdown Controller (SHDWC) 128-bit (4 x 32-bit) General Purpose Backup Registers Clock Generator and Power Management Controller Advanced Interrupt Controller (AIC) and Debug Unit (DBGU) Periodic Interval Timer (PIT), Watchdog Timer (WDT) and Real-time Timer (RTT) Reset Controller (RSTC) Based on a Power-on Reset Cell, Reset Source Identification and Reset Output Control 2 SAM9XE Series DATASHEET Atmel-6254E-ATARM-SAM9XE-Datasheet 20-Nov-15