DSC1101 DSC1121 
Low-Jitter Precision CMOS Oscillator 
 
General Description Features 
The DSC1101 & DSC1121 series of high  Low RMS Phase Jitter: <1 ps (typ) 
performance oscillators utilizes a proven 
 High Stability: 10, 25, 50 ppm 
silicon MEMS technology to provide excellent 
jitter and stability over a wide range of  Wide Temperature Range 
supply voltages and temperatures.  By 
o Automotive: -55 to 125 C 
eliminating the need for quartz or SAW 
o Ext. Industrial: -40 to 105 C 
technology, MEMS oscillators significantly 
o Industrial: -40 to 85 C 
enhance reliability and accelerate product 
o Ext. commercial: -20 to 70 C 
development, while meeting stringent clock 
performance criteria for a variety of 
 High Supply Noise Rejection: -50 dBc 
communications, storage, and networking 
 Short Lead Time: 2 Weeks 
applications. 
 
 Wide Freq. Range: 2.3 to 170 MHz 
DSC1101 has a standby feature allowing it to 
 Small Industry Standard Footprints 
completely power-down when EN pin is 
o 2.5x2.0, 3.2x2.5, 5.0x3.2, & 7.0x5.0 mm 
pulled low; whereas for DSC1121, only the 
outputs are disabled when EN is low.  Both 
 Excellent Shock & Vibration Immunity 
oscillators are available in industry standard 
o Qualified to MIL-STD-883 
2
packages, including the small 3.2x2.5 mm , 
 High Reliability 
and are drop-in replacements for standard 
o 20x better MTF than quartz oscillators 
4-pin CMOS quartz crystal oscillators. 
 
 Low Current Consumption 
 
 Supply Range of 2.25 to 3.6 V 
Block Diagram 
 Standby & Output Enable Function 
 Lead Free & RoHS Compliant 
Applications 
 Storage Area Networks 
o SATA, SAS, Fibre Channel 
 Passive Optical Networks 
 
o EPON, 10G-EPON, GPON, 10G-PON 
 
 Ethernet 
 
o 1G, 10GBASE-T/KR/LR/SR, and FCoE 
Output Enable Modes 
 HD/SD/SDI Video & Surveillance  
EN Pin DSC1101 DSC1121 
 PCI Express 
High Output Active Output Active 
 DisplayPort 
NC Output Active Output Active 
Low Standby Output Disabled 
 
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DSC1101 | DSC1121      Page 1                     MK-Q-B-P-D-110410-01-6 Low-Jitter Precision CMOS Oscillator 
DSC1101  DSC1121  
 
Absolute Maximum Ratings Ordering Code 
 
Item Min Max Unit Condition 
Temp Range 
 
E: -20 to 70
Supply Voltage -0.3 +4.0 V  
Enable Modes Packing 
I: -40 to 85 
0: Enable/Standby T: Tape & Reel 
L: -40 to 105 
Input Voltage -0.3 V +0.3 V  
DD
2: Enable/Disable   : Tube 
M: -55 to 125 
Junction Temp - +150 C  
 
Storage Temp -55 +150 C  
DSC11 0 1 C I 5 125.0000 T 
- 
Soldering Temp - +260 C 40sec max. 
ESD -  V  
Package Stability Freq (MHz) 
  
     HBM 4000 
A: 7.0x5.0mm 1: 50ppm
125.0000 
B: 5.0x3.2mm 2: 25ppm 
    MM 400 
C: 3.2x2.5mm 5: 10ppm 
    CDM 1500 
D: 2.5x2.0mm 
 
N: 7.0x5.0mm (no center pad)
 
Note: 1000+ years of data retention on internal memory  
 
Specifications 
Parameter  Condition Min. Typ. Max. Unit 
1
Supply Voltage V  2.25  3.6 V 
DD
EN pin low  output is disabled   
Supply Current I DSC1101   0.095 mA 
DD
DSC1121 20 22 
Frequency Stability  
Includes frequency variations due 
    Ext Comm. & Ind. only 10 
f to initial tolerance, temp. and   ppm 
    All temp ranges 25 
power supply voltage 
    All temp ranges 50 
Aging f 1 year @25C   5 ppm 
2
Startup Time t T=25C   5 ms 
SU
Input Logic Levels    
 
     Input logic high V 0.75xV  - V 
IH DD
 
     Input logic low V - 0.25xV 
IL DD
3
Output Disable Time t    5 ns 
DA
DSC1101 5 ms 
Output Enable Time t  
EN 
DSC1121 20 ns 
4
Enable Pull-Up Resistor  Pull-up resistor exist 40  k 
 
CMOS Output 
output is enabled 
4
Supply Current I  31 35 mA 
DD
C =15pF, F =125 MHz 
L 0
Output Logic Levels     
     Output logic high V I=6mA 0.9xV - V 
OH DD 
     Output logic low V  - 0.1xV
OL DD 
3
Output Transition time    
20% to 80% 
     Rise Time t  1.1 2 ns 
R
C =15pF 
L
     Fall Time t 1.3 2 
F
All temp range except Auto 2.3 170 
Frequency f  MHz 
0
Auto temp range  100 
Output Duty Cycle  SYM  45  55 % 
Fout=125MHz 3 
Period Jitter J ps 
PER  RMS
  
200kHz to 20MHz @ 125MHz 0.3  
Integrated Phase Noise J 100kHz to 20MHz @ 125MHz  0.38  ps 
PH RMS
12kHz to 20MHz @ 125MHz 1.7 2 
1. Pin 6 V should be filtered with 0.1uf capacitor. 
DD
2. t is time to 100PPM of output frequency after V is applied and outputs are enabled. 
su DD
3. Output Waveform and Test Circuit figures below define the parameters. 
4. Output is enabled if pad is floated or not connected. 
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DSC1101 | DSC1121      Page 2                     MK-Q-B-P-D-110410-01-6