DSC1103 DSC1123 Low-Jitter Precision LVDS Oscillator General Description Features The DSC1103 & DSC1123 series of high Low RMS Phase Jitter: <1 ps (typ) performance oscillators utilizes a proven High Stability: 10, 25, 50 ppm silicon MEMS technology to provide excellent jitter and stability over a wide range of Wide Temperature Range supply voltages and temperatures. By o Industrial: -40 to 85 C eliminating the need for quartz or SAW o Ext. commercial: -20 to 70 C technology, MEMS oscillators significantly High Supply Noise Rejection: -50 dBc enhance reliability and accelerate product development, while meeting stringent clock Short Lead Time: 2 Weeks performance criteria for a variety of Wide Freq. Range: 2.3 to 460 MHz communications, storage, and networking applications. Small Industry Standard Footprints o 2.5x2.0, 3.2x2.5, 5.0x3.2, & 7.0x5.0 mm DSC1103 has a standby feature allowing it to Excellent Shock & Vibration Immunity completely power-down when EN pin is o Qualified to MIL-STD-883 pulled low whereas for DSC1123, only the outputs are disabled when EN is low. Both High Reliability oscillators are available in industry standard 2 o 20x better MTF than quartz oscillators packages, including the small 3.2x2.5 mm , and are drop-in replacements for standard Low Current Consumption 6-pin LVDS quartz crystal oscillators. Supply Range of 2.25 to 3.6 V Standby & Output Enable Function Block Diagram Lead Free & RoHS Compliant LVPECL & HCSL Versions Available Applications Storage Area Networks o SATA, SAS, Fibre Channel Passive Optical Networks o EPON, 10G-EPON, GPON, 10G-PON Ethernet o 1G, 10GBASE-T/KR/LR/SR, and FCoE Output Enable Modes HD/SD/SDI Video & Surveillance EN Pin DSC1103 DSC1123 PCI Express: Gen 1 & Gen 2 High Outputs Active Outputs Active DisplayPort NC Outputs Active Outputs Active Low Standby Outputs Disabled DSC1103 DSC1123 Page 1 MK-Q-B-P-D-110410-03-6 Low-Jitter Precision LVDS Oscillator DSC1103 DSC1123 Absolute Maximum Ratings Ordering Code Item Min Max Unit Condition Temp Range Supply Voltage -0.3 +4.0 V Enable Modes Packing E: -20 to 70 0: Enable/Standby T: Tape & Reel I: -40 to 85 Input Voltage -0.3 V +0.3 V DD 2: Enable/Disable : Tube L: -40 to 105 Junction Temp - +150 C Storage Temp -55 +150 C DSC11 0 3 C I 5 125.0000 T - Soldering Temp - +260 C 40sec max. ESD - V Package Stability Freq (MHz) HBM 4000 A: 7.0x5.0mm 1: 50ppm 125.0000 B: 5.0x3.2mm 2: 25ppm MM 400 C: 3.2x2.5mm 5: 10ppm CDM 1500 D: 2.5x2.0mm N: 7.0x5.0mm (no center pad) Note: 1000+ years of data retention on internal memory Specifications Parameter Condition Min. Typ. Max. Unit 1 Supply Voltage V 2.25 3.6 V DD EN pin low outputs are disabled Supply Current I DSC1103 0.095 mA DD DSC1123 20 22 Includes frequency variations due 10 Frequency Stability f to initial tolerance, temp. and ppm 25 power supply voltage 50 Aging f 1 year 25C 5 ppm 2 Startup Time t T=25C 5 ms SU Input Logic Levels Input logic high V 0.75xV - V IH DD Input logic low V - 0.25xV IL DD 3 Output Disable Time t 5 ns DA DSC1103 5 ms Output Enable Time t EN DSC1123 20 ns 4 Enable Pull-Up Resistor Pull-up resistor exist 40 k LVDS Outputs Supply Current I Output Enabled, R =100 29 32 mA DD L Output offset Voltage V R=100 Differential 1.125 1.4 V OS Delta Offset Voltage V 50 mV OS Pk to Pk Output Swing V Single-Ended 350 mV PP 3 Output Transition time 20% to 80% Rise Time t 200 ps R R =50, C = 2pF L L Fall Time t F Frequency f Single Frequency 2.3 460 MHz 0 Output Duty Cycle SYM Differential 48 52 % Period Jitter J 2.5 ps PER RMS 200kHz to 20MHz 156.25MHz 0.28 Integrated Phase Noise J 100kHz to 20MHz 156.25MHz 0.4 ps PH RMS 12kHz to 20MHz 156.25MHz 1.7 2 Notes: 1. Pin 6 V should be filtered with 0.1uf capacitor. DD 2. t is time to 100ppm of output frequency after V is applied and outputs are enabled. su DD 3. Output Waveform and Test Circuit figures below define the parameters. 4. Output is enabled if pad is floated or not connected. DSC1103 DSC1123 Page 2 MK-Q-B-P-D-110410-03-6