Product Information

DSPIC33FJ64GP202-I/SO

DSPIC33FJ64GP202-I/SO electronic component of Microchip

Datasheet
Digital Signal Processors & Controllers - DSP, DSC 16B DSC 28LD64KB DMA 40MIPS

Manufacturer: Microchip
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Price (USD)

2: USD 5.3449 ea
Line Total: USD 10.69

0 - Global Stock
MOQ: 2  Multiples: 1
Pack Size: 1
Availability Price Quantity
0 - WHS 1


Ships to you between Fri. 24 May to Thu. 30 May

MOQ : 135
Multiples : 1
135 : USD 6.5991

0 - WHS 2


Ships to you between Thu. 30 May to Mon. 03 Jun

MOQ : 135
Multiples : 135
135 : USD 5.7427

0 - WHS 3


Ships to you between Fri. 24 May to Thu. 30 May

MOQ : 1
Multiples : 1
1 : USD 7.77
3 : USD 6.832
7 : USD 6.468
100 : USD 6.048

0 - WHS 4


Ships to you between Fri. 24 May to Thu. 30 May

MOQ : 2
Multiples : 1
2 : USD 5.3449

     
Manufacturer
Product Category
Built-In Generator
Interface
Kind Of Architecture
Case
Mounting
Integrated Circuit Features
Family
Type Of Integrated Circuit
Sram Memory Capacity
Program Memory
Number Of 16Bit Timers
Number Of 32Bit Timers
Operating Voltage
Number Of Inputs/Outputs
Clock Frequency
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dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, and dsPIC33FJ128GPX02/X04 16-bit Digital Signal Controllers (up to 128 KB Flash and 16K SRAM) with Advanced Analog Operating Conditions System Peripherals 3.0V to 3.6V, -40C to +150C, DC to 20 MIPS 16-bit dual channel 100 ksps Audio DAC 3.0V to 3.6V, -40C to +125C, DC to 40 MIPS Cyclic Redundancy Check (CRC) module Up to five 16-bit and up to two 32-bit Timers/ Clock Management Counters Up to four Input Capture (IC) modules 2% internal oscillator Up to four Output Compare (OC) modules Programmable PLL and oscillator clock sources Real-Time Clock and Calendar (RTCC) module Fail-Safe Clock Monitor (FSCM) Independent Watchdog Timer Communication Interfaces Low-power management modes Parallel Master Port (PMP) Fast wake-up and start-up Two UART modules (10 Mbps) Core Performance - Supports LIN 2.0 protocols - RS-232, RS-485, and IrDA support Up to 40 MIPS 16-bit dsPIC33F CPU Two 4-wire SPI modules (15 Mbps) Single-cycle MUL plus hardware divide Enhanced CAN (ECAN) module (1 Mbaud) with Advanced Analog Features 2.0B support 2 I C module (100K, 400K and 1Mbaud) with 10/12-bit ADC with 1.1Msps/500 ksps rate: SMbus support - Up to 13 ADC input channels and four S&H 2 Data Converter Interface (DCI) module with I S - Flexible/Independent trigger sources codec support 150 ns Comparators: - Up to two Analog Comparator modules Direct Memory Access (DMA) - 4-bit DAC with two ranges for Analog Comparators 8-channel DMA with no CPU stalls or overhead UART, SPI, ADC, ECAN, IC, OC, INT0 Input/Output Software remappable pin functions Qualification and Class B Support 5V-tolerant pins AEC-Q100 REVG (Grade 0 -40C to +150C) Selectable open drain and internal pull-ups Class B Safety Library, IEC 60730, VDE certified Up to 5 mA overvoltage clamp current/pin Multiple external interrupts Debugger Development Support In-circuit and in-application programming Two program breakpoints Trace and run-time watch Packages Type SPDIP SOIC QFN-S QFN TQFP Pin Count 28 28 28 44 44 I/O Pins 21 21 21 35 35 Contact Lead/Pitch .100 1.27 0.65 0.65 0.80 Dimensions .285x.135x1.365 7.50x2.05x17.9 6x6x0.9 8x8x0.9 10x10x1 Note: All dimensions are in millimeters (mm) unless specified. 2007-2012 Microchip Technology Inc. DS70292G-page 1dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04 dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04 PRODUCT FAMILIES The device names, pin counts, memory sizes, and peripheral availability of each device are listed below. The following pages show their pinout diagrams. TABLE 1: dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04 CONTROLLER FAMILIES Remappable Peripheral Device dsPIC33FJ128GP804 44 128 16 26 5 4 4 1221 11 1 13 6 1/1 11 35 QFN 3 TQFP dsPIC33FJ128GP802 28 128 16 16 5 4 4 1221 3 1 1 1 10 4 1/0 2 21 SPDIP SOIC QFN-S dsPIC33FJ128GP204 44 128 8 26 5 4 4 1220 3 1 1 1 13 0 1/1 11 35 QFN TQFP dsPIC33FJ128GP202 28 128 8 16 5 4 4 1220 3 1 1 1 10 0 1/0 2 21 SPDIP SOIC QFN-S dsPIC33FJ64GP804 44 64 16 26 5 4 4 1221 3 1 1 1 13 6 1/1 11 35 QFN TQFP dsPIC33FJ64GP802 28 64 16 16 5 4 4 1221 3 1 1 1 10 4 1/0 2 21 SPDIP SOIC QFN-S dsPIC33FJ64GP204 44 64 8 26 5 4 4 1220 3 1 1 1 13 0 1/1 11 35 QFN TQFP dsPIC33FJ64GP202 28 64 8 16 5 4 4 1220 3 1 1 1 10 0 1/0 2 21 SPDIP SOIC QFN-S dsPIC33FJ32GP304 44 32 4 26 5 4 4 1220 3 1 1 1 13 0 1/1 11 35 QFN TQFP dsPIC33FJ32GP302 28 32 4 16 5 4 4 1220 3 1 1 1 10 0 1/0 2 21 SPDIP SOIC QFN-S Note 1: RAM size is inclusive of 2 Kbytes of DMA RAM for all devices except dsPIC33FJ32GP302/304, which include 1 Kbyte of DMA RAM. 2: Only four out of five timers are remappable. 3: Only two out of three interrupts are remappable. DS70292G-page 2 2007-2012 Microchip Technology Inc. Pins Program Flash Memory (Kbyte) (1) RAM (Kbyte) Remappable Pins (2) 16-bit Timer Input Capture Output Compare Standard PWM Data Converter Interface UART SPI ECAN (3) External Interrupts RTCC 2 I C CRC Generator 10-bit/12-bit ADC (Channels) 16-bit Audio DAC (Pins) Analog Comparator (2 Channels/Voltage Regulator) 8-bit Parallel Master Port (Address Lines) I/O Pins Packages

Tariff Desc

8542.31.00 52 No ..CMOS and MOS Microprocessors (MPU), Microcontrollers (MCU) and Digital Signal Processors (DSP)

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