Product Information

HV66PG-G M919

HV66PG-G M919 electronic component of Microchip

Datasheet
LCD Drivers LCD DRVR 5V

Manufacturer: Microchip
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

500: USD 2.9863 ea
Line Total: USD 1493.15

0 - Global Stock
MOQ: 500  Multiples: 500
Pack Size: 500
Availability Price Quantity
0 - WHS 1


Ships to you between Thu. 30 May to Mon. 03 Jun

MOQ : 500
Multiples : 500

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HV66PG-G M919
Microchip

500 : USD 2.9863

     
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Product Category
Maximum Clock Frequency
Operating Supply Voltage
Supply Current - Max
Pd - Power Dissipation
Minimum Operating Temperature
Maximum Operating Temperature
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Supertex inc. HV66 32-Channel LCD Driver with Separate Backplane Output Features General Description HVCMOS technology The HV66 is a low voltage serial to high voltage parallel converter 32 push-pull CMOS output up to 60V with push-pull outputs. This device has been designed for use as a driver circuit for LCD displays. It can also be used in any appli- Low power level shifting cation requiring multiple output high voltage current sourcing and Shift register speed 5.0MHz sinking capabilities. The inputs are fully CMOS compatible. Latched data outputs Bidirectional shift register (DIR) The device consists of a 32-bit shift register, 32 latches, and con- Backplane output trol logic to perform blanking and polarity control of the outputs. HV 1 is connected to the first stage of the shift register. Data is OUT shifted through the shift register on the logic rising transition of the clock. A DIR pin causes data shifting clockwise when grounded and counter clockwise when connected to VDD. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register. Operation of the shift register is not affected by the LE (latch enable), BL (blank) or the POL (polarity) inputs. Transfer of data from the shift register to the latch occurs when the LE (latch enable) input is high. The data in the latch is stored after LE transitions from high to low. Functional Block Diagram VPP POL BL LE VDD HV 1 OUT DATA IN Latch CLK HV 2 OUT Latch 32-Bit (Outputs 3 to 30 Shift DIR not shown) Register HV 31 OUT Latch DATA OUT HV 32 OUT Latch BP OUT GND Doc. DSFP-HV66 Supertex inc. C070313 www.supertex.comHV66 Ordering Information Pin Configuration Part Number Package Option Packing HV66PG-G 44-Lead PQFP 96/Tray HV66PG-G M919 44-Lead PQFP 500/Reel 44 HV66PJ-G 44-Lead PLCC 27/Tube 1 HV66PJ-G M903 44-Lead PLCC 500/Reel 44-Lead PQFP (top view) -G denotes a lead (Pb)-free / RoHS compliant package 6 40 1 44 1 Absolute Maximum Ratings Parameter Value 2 Supply voltage, V -0.5V to +7.0V DD 2 Supply voltage, V -0.5V to +70V PP 44-Lead PLCC (top view) Logic input levels -0.5V to V +0.5V DD 3 Product Marking Ground current 1.5A Top Marking 4 Continuous total power dissipation 1200mW YY = Year Sealed YYWW HV66PG WW = Week Sealed Operating temperature range -40C to +85C LLLLLLLLL L = Lot Number C = Country of Origin* Bottom Marking Storage temperature range -65C to +125C A = Assembler ID* Absolute Maximum Ratings are those values beyond which damage to the CCCCCCCC = Green Packaging AAA device may occur. Functional operation under these conditions is not implied. *May be part of top marking Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to GND. Package may or may not include the following marks: Si or Notes: 44-Lead PQFP 1. Device will survive (but operation may not be specified or guaranteed) at these extremes Top Marking 2. All voltages are referenced to GND 3. Duty cycle is limited by the total power dissipated in the package YYWW AAA YY = Year Sealed 4. For operation above 25C ambient derate linearly to 85C at 20mW/C HV66PJ WW = Week Sealed LLLLLLLLLL A = Assembler ID L = Lot Number Bottom Marking Typical Thermal Resistance C = Country of Origin* = Green Packaging Package ja *May be part of top marking CCCCCCCCCCC O 44-Lead PQFP 51 C/W O 44-Lead PLCC 37 C/W Package may or may not include the following marks: Si or 44-Lead PLCC Recommended Operating Conditions Sym Parameter Min Max Units V Logic supply voltage 4.5 5.5 V DD V High voltage supply 12 60 V PP V High-level input voltage 2.4 V V IH DD V Low-level input voltage 0 0.8 V IL f Clock frequency 0 5.0 MHz CLK T Operating free-air temperature -40 +85 C A I Allowable current through output diodes - 200 mA OD Doc. DSFP-HV66 Supertex inc. C070313 www.supertex.com 2

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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