LPC47N267 100-Pin LPC Super I/O with X-Bus Interface Enhanced Digital Data Separator Product Features - 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 3.3 Volt Operation (5V tolerant) Kbps Data Rates Programmable Wakeup Event Interface - Programmable Precompensation Modes (IO PME Pin) Serial Ports SMI Support (IO SMI Pin) - Two Full Function Serial Ports GPIOs (29) - High Speed NS16C550 Compatible UARTs Four IRQ Input Pins with Send/Receive 16-Byte FIFOs X-Bus Interface - Supports 230k and 460k Baud - Supports up to 4 external components - Programmable Baud Rate Generator - Supports I/O cycles (No Memory Support) - Modem Control Circuitry - 8-Bit Data Transfer Infrared Communications Controller - 16-Bit Address Qualification - IrDA v1.2 (4Mbps), HPSIR, ASKIR, Con- - Write Protection for each component sumer IR Support XNOR Chain -2 IR Ports PC99 and ACPI 1.0b Compliant - 96 Base I/O Address, 15 IRQ Options and 3 100-pin STQFP Package DMA Options Intelligent Auto Power Management Multi-Mode Parallel Port with ChiProtect 2.88MB Super I/O Floppy Disk Controller - Standard Mode IBM PC/XT, PC/AT, and PS/2 Compatible Bidirectional Parallel Port - Licensed CMOS 765B Floppy Disk Controller - Software and Register Compatible with - Enhanced Parallel Port (EPP) Compatible - EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) Microchip s Proprietary 82077AA Compatible Core - IEEE 1284 Compliant Enhanced Capabilities Port (ECP) - Supports One Floppy Drive Directly - Configurable Open Drain/Push-Pull Output - ChiProtect Circuitry for Protection Against Damage Due to Printer Power-On Drivers - Supports Vertical Recording Format - 192 Base I/O Address, 15 IRQ and 3 DMA Options - 16-Byte Data FIFO LPC Bus Host Interface - 100% IBM Compatibility - Multiplexed Command, Address and Data - Detects All Overrun and Underrun Conditions Bus - Sophisticated Power Control Circuitry (PCC) - 8-Bit I/O Transfers Including Multiple Powerdown Modes for - 8-Bit DMA Transfers Reduced Power Consumption - DMA Enable Logic - 16-Bit Address Qualification - Serial IRQ Interface Compatible with Serial- - Data Rate and Drive Control Registers ized IRQ Support for PCI Systems - Swap Drives A and B - PCI nCLKRUN Support - Non-Burst Mode DMA Option - Power Management Event (IO PME ) Inter- - 48 Base I/O Address, 15 IRQ and 3 DMA face Pin Options Mechanical Package - Forceable Write Protect and Disk Change - 100 pin STQFP (12mm x 12mm body size) Controls Floppy Disk Available on Parallel Port Pins (ACPI Compliant) 2008 - 2014 Microchip Technology Inc. DS00001814A-page 1LPC47N267 Description The Microchip LPC47N267 is a 3.3V PC 99 and ACPI 1.0 compliant Super I/O Controller. The LPC47N267 implements an LPC interface, a pin reduced ISA interface, for supported I/O and DMA cycles. In addition, this part includes an X- Bus interface that may be accessed through the LPC interface for supported I/O cycles (memory cycles are not sup- ported by this device). The X-Bus interface supports as many as four external components and it offers three different modes of operation for interfacing with these components. The X-Bus interface has an added Write Protect feature that ensures that the Base Address and disable bit for each component can only be set by the BIOS to prevent corrup- tion by any virus software. This part also includes 29 GPIO pins. The LPC47N267 incorporates Microchips true CMOS 765B floppy disk controller, advanced digital data separator, 16- byte data FIFO, two 16C550 compatible UARTs, one Multi-Mode parallel port with ChiProtect circuitry plus EPP and ECP support and one floppy direct drive support. The LPC47N267 does not require any external filter components, is easy to use and offers lower system cost and reduced board area. The LPC47N267 is software and register compatible with Microchips proprietary 82077AA core. The true CMOS 765B core provides 100% compatibility with IBM PC/XT and PC/AT architectures and provides data overflow and underflow protection. The Microchip advanced digital data separator incorporates Microchips patented data separator technology allowing for ease of testing and use. The LPC47N267 supports both 1Mbps and 2Mbps data rates and vertical recording operation at 1Mbps Data Rate. The LPC47N267 also features a full 16-bit internally decoded address bus, a Serial IRQ interface with PCI nCLKRUN support, relocatable configuration ports and three DMA channel options. Both on-chip UARTs are compatible with the NS16C550. One UART includes additional support for a Serial Infrared Interface that complies with IrDA v1.2 (Fast IR), HPSIR, and ASKIR formats (used by Sharp and other PDAs), as well as Consumer IR. The parallel port is compatible with IBM PC/AT architectures, as well as IEEE 1284 EPP and ECP. The parallel port ChiProtect circuitry prevents damage caused by an attached powered printer when the LPC47N267 is not powered. The LPC47N267 incorporates sophisticated power control circuitry (PCC). The PCC supports multiple low power down modes. The LPC47N267 also features Software Configurable Logic (SCL) for ease of use. SCL allows programmable system configuration of key functions such as the FDC, parallel port, and UARTs. The LPC47N267 supports the ISA Plug-and-Play Standard (Version 1.0a) and provides the recommended functionality to support Windows 95/98 and PC99. The I/O Address, DMA Channel and Hardware IRQ of each device in the LPC47N267 may be reprogrammed through the internal configuration registers. There are 192 I/O address location options, a Serialized IRQ interface, and three DMA channels. DS00001814A-page 2 2008 - 2014 Microchip Technology Inc.