MCP39F521 2 I C Power Monitor with Calculation and Energy Accumulation Features Description Power Monitoring Accuracy Capable of 0.1% The MCP39F521 is a highly integrated, complete Error Across 4000:1 Dynamic Range single-phase power-monitoring device, designed for real-time measurement of input power for AC/DC Built-In Calculations on Fast 16-bit Processing power supplies, power distribution units, consumer and Core industrial applications. It includes dual-channel - Active, Reactive, Apparent Power delta-sigma ADCs, a 16-bit calculation engine, - True Root Mean Square (RMS) Current, 2 C interface. EEPROM and a flexible two-wire I RMS Voltage Anintegrated low-drift voltage reference with - Line Frequency, Power Factor 10 ppm/C in addition to 94.5 dB of signal-to-noise and 64-bit Wide Import and Export Active Energy distortion ratio (SINAD) performance on each Accumulation Registers measurement channel allows for better than 0.1% accurate designs across a 4000:1 dynamic range. 64-bit Four Quadrant Reactive Energy Accumulation Registers Package Types Signed Active and Reactive Power Outputs MCP39F521 Dedicated Zero Crossing Detection (ZCD) Pin 5x5 QFN* Output with Less than 100 s Latency Automatic Event Pin Control through Fast Voltage Surge Detection, Less than 5 ms Delay 2 C Interface, up to 400 kHz Clock Rate I Two Independent Registers for Minimum and Maximum Output Quantity Tracking 28 27 26 25 24 23 22 Fast Calibration Routines and Simplified 1 A EVENT 21 GND Command Protocol NC 2 20 AN IN 512 Bytes User-Accessible EEPROM through NC 3 19 V1+ Page Read/Write Commands EP COMMON 4 18 B V1- Low-Drift Internal Voltage Reference, 29 COMMON A 5 17 I1- 10 ppm/C Typical 16 I1+ OSCI 6 28-lead 5 x 5 mm QFN Package OSCO A1 Extended Temperature Range -40C to +125C 7 15 8 9 10 11 12 13 14 Applications Power Monitoring for Home Automation Industrial Lighting Power Monitoring Real-Time Measurement of Input Power for *Includes Exposed Thermal Pad (EP) see Table 3-1. AC/DC Supplies Intelligent Power Distribution Units 2015 Microchip Technology Inc. DS20005442A-page 1 DR NC NC D GND RESET MCLR AV DV DD DD D A0 GND REFIN+/OUT SCL ZCD SDAMCP39F521 Functional Block Diagram AV A DV D DD GND DD GND Timing OSCI GGeenenerarattiionon A1 OSCO Internal A0 2 Oscillator I C Serial Interface SCL 24-bit Delta-Sigma I1+ + SDA Multi-Level PGA I1- - Modulator ADC 16-BIT CORE FLASH 24-bit Delta-Sigma V1+ + Multi-Level PGA EVENT Calculation V1- - Modulator ADC Engine Digital Outputs (CE) ZCD 10-bit SAR AN IN ADC DS20005442A-page 2 2015 Microchip Technology Inc. 3 3 SINC SINC Digital Filter Digital Filter