MEC1632X-AUE

MEC1632 Low Power 32-Bit Mobile Embedded Controller System to EC Message Interface Highlights - 8042 Style Host Interface 3.3V Operation - Embedded Memory Interface ACPI Compliant - Host Serial or Parallel IRQ Source LPC Interface - Provides Two Windows to On-Chip SRAM for Host VTR (standby) and VBAT Power Planes Access - Two Register Mailbox Command Interface - Low Standby Current in Sleep Mode - Host Access of Virtual Registers Without EC Configuration Register Set Intervention - Compatible with ISA Plug-and-Play Standard - Mailbox Registers Interface - EC-Programmable Base Address - Thirty-two 8-Bit Scratch Registers ARC-625D Embedded Controller (EC) - Two Register Mailbox Command Interface - Two Register SMI Source Interface - 16 KB Single Cycle 32-bit Wide Dual-ported - ACPI Embedded Controller Interface SRAM, Accessible as Closely Coupled Data Memory and Instruction Memory - Four Instances - 1 or 4 Byte Data transfer capable - 4KB Boot ROM - Full-duplex Register Access - 32 x 32 64 Fast Multiply - ACPI Power Management Interface - Divide Assist and Saturation Arithmetic - SCI Event-Generating Functions - Maskable Interrupt Aggregator/Accelerator Battery Backed Resources Interface - Power-Fail Status Register - Maskable Hardware Wake-Up Events - 32 KHz Clock Generator - Sleep mode - Week Alarm Timer Interface with Program- - JTAG Debug Port, Includes JTAG Master mable Wake-up from 1ms to 45 Days - MCU Serial Debug Port - VBAT-Powered Control Interface -1 S Delay Register - Six Wake-up Input Signals - 10-Channel DMA Interface Supports SMBus - Optional Latching of Wake-up Inputs Controllers and EC/Host GP-SPI Controllers - VBAT-Backed 64 Byte Memory Embedded Flash Four EC-based SMBus 2.0 Host Controllers - 192 KB user space, 32-bit Access, 10 K - Allows Master or Dual Slave Operation Cycles Endurance - Controllers are Fully Operational on Standby - Flash Security Enhancements Power 4K Boot Block Protection 2 - DMA-driven I C Network Layer Hardware Direct JTAG and Direct LPC-protected (2) Pages at 2 C Datalink Compatibility Mode -I or Near Top of Memory for Password Protection - Multi-Master Capable - Multiple Flash Programming Options - Supports Clock Stretching JTAG programmable BIOS programmable - Programmable Bus Speed up to 400KHz Programmable by EC at Power-on Using UART - Hardware Bus Access Fairness Interface Programmable on a Gang Programmer via Gang- - SMBus Time-outs Interface programmer Interface - AMD-TSI Port Embedded Non-volatile Read/Write Memory - 12 Ports Assignable to Any Controller - 2 KB of EEPROM, Single Byte Access, 250K Cycles Endurance - 3 SMBus Isolation Switches - Three Pairs of Ports Can Be Joined - 8-byte Block Erasable, 128 Blocks PECI Interface 3.0 - Independent of main Flash memory Legacy Support - Fast GATEA20 & Fast CPU RESET 2012-2018 Microchip Technology Inc. DS00001592B-page 1MEC1632 18 x 8 Interrupt Capable Multiplexed Keyboard - One 4-pin EC/Host-driven Full Duplex Serial Scan Matrix Communication Interface to SPI Flash Inter- face - Optional Push-Pull Drive for Fast Signal Switching - Flexible Clock Rates Three independent Hardware Driven PS/2 Ports - SPI Burst Capable - Fully functional on Main and/or Suspend FAN Support Power - Six Programmable Pulse-Width Modulator - PS/2 Edge Wake Capable (PWM) Outputs General Purpose I/O Pins - Multiple Clock Rates - 16-Bit On & 16-Bit Off Counters - 142 GPIOs - Six Fan Tachometer Inputs - 8 GPIO Pass-Through Port (GPTP) - 6 x 2 Capture/Compare Timer Interface - Glitch protection on all GPIO pins ADC Interface -6 Battery-powered General Purpose Outputs - 10-bit Conversion in 10s Low Power Programmable LED Interface - 16 Channels - Supports three modes of operation: - Integral Non-Linearity of 0.5 LSB Differen- - Blinking Mode with Programmable Blink Rates tial Non-Linearity of 0.5 LSB - Breathing LED Output -8-bit PWM 2-Pin Debug Port with Standard 16C550 Register - Breathing LED Supports Piecewise-linear Interface Brightness Curves, Symmetric or Asymmetric - Accessible from Host and EC - Supports Low Power Operation in Blinking - Programmable Input/output Pin Polarity and Breathing Modes Inversion - Operates on Standby Power - Programmable Main Power or Standby - Operates in Chip s System Deepest Sleep State on Power Functionality 32kHz standby clock Port 80h Debug Ports for BIOS Debug - Operational in EC Sleep State - Two Ports, Assignable to Any LPC IO - Provides Three LED pins Address - LED pin buffers capable of sinking up to 20 mA - 24-bit Timestamp with Adjustable Timebase Programmable 16-bit Counter/Timer Interface - 16-Entry FIFO - Four Wake-capable 16-bit Auto-reloading Resistor/Capacitor Identification Detection Counter/Timer Instances (RC ID) - Four Operating Modes per Instance: Timer, - Single Pin Interface to External Inexpensive One-shot, Event and Measurement RC Circuit - 4 External Inputs, 4 External Outputs - Replacement for Multiple GPIOs Hibernation Timer Interface - Provides 8 Quantized States on One Pin - Two 32.768 KHz Driven Timers Integrated Standby Power Reset Generator - Programmable Wake-up from 0.5ms to 128 - Reset Input Pin Minutes - Reset Output Pin System Watch Dog Timer (WDT) HDMI Consumer Electronics Control (CEC) Bus Input Capture and Compare Timer Controller - 32-bit Free-running timer Clock Generator - Six 32-bit Capture Registers - 32.768KHz Clock Source - Two 32-bit Compare Registers - Low power 32KHz crystal oscillator - Capture, Compare and Overflow Interrupts - Optional use of a crystal-free silicon oscillator with BC-Link Interconnection Bus 2% Accuracy - Optional use of 32.768 KHz input Clock - Two High Speed and one Low Speed Bus - Operational on Suspend Power Masters Controllers - Programmable Clock Power Management Two General Purpose Serial Peripheral Interface Control & Distribution Controllers (ECGP-SPI) - 20.27 MHz silicon oscillator, 2% Accuracy - One 3-pin EC-driven Full Duplex Serial Com- munication Interface Real Time Clock Package - 169 Pin LFBGA RoHS Compliant package DS00001592B-page 2 2012-2018 Microchip Technology Inc.