PAC1931/2/3/4 Single/Multi-Channel DC Power/Energy Monitor with Accumulator Features Applications High-Side Current Monitor with One, Two, Three Embedded Computing or Four Channels Networking - 100 mV full-scale range for current sense FPGA Systems voltage,16-bit resolution Automotive - Selectable bidirectional current sense Low Voltage/High Power AI, GPU capability, -100 mV to +100 mV range, 16-bit Industrial twos complement (signed) data format Linux Applications - External sense resistor sets full scale current Notebook and Tablet Computing range Cloud, Linux and Server Computing - Very low input current simplifies routing Optical Networking Modules Wide Bus Voltage Range for Voltage Monitor - 0V to 32V input common-mode voltage Computing Platform Support - 16-bit resolution for voltage measurements 14 bits are used for power calculations Windows 10 Driver Real Time Auto-Calibration of Offset and Gain Linux Driver Errors for Voltage and Current, No User Python Script Adjustment Required 1% Power Measurement Accuracy over a Wide Description Dynamic Range The PAC1931/2/3/4 are one, two, three and On-Chip Accumulation of 28-bit Power Results for four-channel power and energy monitoring devices. A Energy Measurement high-voltage multiplexer sequentially connects the - 48-bit power accumulator register for inputs to a bus voltage monitor and current sense recording accumulated power data amplifier that feed high-resolution ADCs. Digital - 24-bit Accumulator Count circuitry performs power calculations and energy - User programmable sampling rates of 8, 64, accumulation. 256 and 1024 samples per second This enables energy monitoring with integration - 17 minutes of power data accumulation periods from 1ms up to 36 hours or longer. Bus minimum at 1024 S/s voltage, sense resistor voltage and accumulated - Over 36 hours of power data accumulation proportional power are stored in registers for retrieval minimum at 8 S/s by the system master or Embedded Controller. 2.7V to 5.5V Supply Operation The sampling rate and energy integration period can be I/O pin for digital I/O 2 - Separate V DD C. Active channel selection, controlled over SMBus or I - 1.62-5.5V capable SMBus and digital I/O one-shot measurements and other controls are also 2 2 configurable by SMBus or I C. - SMBus 3.0 and I C Fast Mode Plus (1 Mb/S) SMBus Address 16 Options, set with Resistor The PAC1931/2/3/4 device family uses real time calibration to minimize offset and gain errors. No input No Input Filters Required filters are required for this device. ALERT Features that can be Enabled: - ALERT on accumulator overflow - ALERT on Conversion Complete 4 4 0.5 mm UQFN Package 2.225 2.17 mm WLCSP Package 2017-2019 Microchip Technology Inc. DS20005850E-page 12 I C/SMBus PAC1931/2/3/4 Package Types PAC1932/3/4 Top View PAC1931/2/3/4 Top View 44 0.5mm UQFN* 2.225 2.17 mm WLCSP 12 3 4 A SENSE2+ SENSE1- SENSE1+ V DD 1 12 SLOW/ALERT SENSE1- B 2 11 V SENSE1+ DD Exposed pad SENSE2- V I/O PWRDN GND DD GND 3 10 SENSE4+ SM CLK 4 9 SENSE4- C SENSE3- ADDRSEL SLOW/ALERT SM CLK D SENSE3+ SENSE4- SENSE4+ SM DATA *Includes Exposed Thermal Pad see Table 3-1. Device Block Diagram V GND DD SENSE 1+ V BUS1 V BUS V BUS Buffer/ 16-bit Sense1+ Registers Divider ADC SENSE 1- Sense1- Calculation V I/O DD and V SENS E V Differential SENSE 2+ BUS2 Calibration Registers 16-bit VSENS E ADC Amplifier Sense2+ SENSE 2- Sense2- VPOWE R Registers SENSE 3+ V BUS3 SM CLK Accumulator Accumlator Sense3+ SM DATA Registers SENSE 3- Sense3- SLOW/ALERT SENSE 4+ V BUS4 ADC/MUX Clocking & Control PWRDN Control Registers Sense4+ SENSE 4- Sense4- High Voltage MUX Resistor ADDRSEL Decoder Note: For PAC1931, channels 2, 3 and 4 are inactive. For PAC1932, channels 3 and 4 are inactive. For PAC1933, channel 4 is inactive. DS20005850E-page 2 2017-2019 Microchip Technology Inc. SM DATA 5 16 PWRDN ADDRSEL 6 15 V I/O DD SENSE3- 7 14 SENSE2- SENSE3+ 8 13 SENSE2+