Product Information

SST26VF032BT-104V/MF

SST26VF032BT-104V/MF electronic component of Microchip

Datasheet
NOR Flash 32Mbit SPISQI flash 105C 2.3V-3.6V

Manufacturer: Microchip
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

2000: USD 2.9426 ea
Line Total: USD 5885.2

0 - Global Stock
MOQ: 2000  Multiples: 2000
Pack Size: 2000
Availability Price Quantity
0 - Warehouse 1


Ships to you between Mon. 06 May to Fri. 10 May

MOQ : 2000
Multiples : 2000
2000 : USD 3.1613

0 - Warehouse 2


Ships to you between Fri. 10 May to Tue. 14 May

MOQ : 2000
Multiples : 2000
2000 : USD 2.9095

     
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RoHS - XON
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SST26VF032B / SST26VF032BA 2.5V/3.0V 32 Mbit Serial Quad I/O (SQI) Flash Memory Security ID Features - One-Time Programmable (OTP) 2 KByte, Secure ID Single Voltage Read and Write Operations - 64 bit unique, factory pre-programmed identifier - 2.7-3.6V or 2.3-3.6V - User-programmable area Serial Interface Architecture Temperature Range - Nibble-wide multiplexed I/Os with SPI-like serial - Industrial: -40C to +85C command structure - Industrial Plus: -40C to +105C - Mode 0 and Mode 3 Automotive AECQ-100 Grade 2 and Grade 3 - x1/x2/x4 Serial Peripheral Interface (SPI) Protocol Packages Available High Speed Clock Frequency - 8-contact WDFN (6mm x 5mm) - 2.7-3.6V: 104 MHz max - 8-lead SOIJ (5.28 mm) - 2.3-3.6V: 80 MHz max - 24-ball TBGA (6mm x 8mm) Burst Modes All devices are RoHS compliant - Continuous linear burst - 8/16/32/64 Byte linear burst with wrap-around Product Description Superior Reliability The Serial Quad I/O (SQI) family of flash-memory - Endurance: 100,000 Cycles (min) devices features a six-wire, 4-bit I/O interface that allows for - Greater than 100 years Data Retention low-power, high-performance operation in a low pin-count Low Power Consumption: package. SST26VF032B/032BA also support full com- - Active Read current: 15 mA (typical @ 104 MHz) mand-set compatibility to traditional Serial Peripheral Inter- - Standby Current: 15 A (typical) face (SPI) protocol. System designs using SQI flash devices Fast Erase Time occupy less board space and ultimately lower system costs. - Sector/Block Erase: 18 ms (typ), 25 ms (max) All members of the 26 Series, SQI family are manufactured - Chip Erase: 35 ms (typ), 50 ms (max) with proprietary, high-performance CMOS SuperFlash Page-Program technology. The split-gate cell design and thick-oxide tun- neling injector attain better reliability and manufacturability - 256 Bytes per page in x1 or x4 mode compared with alternate approaches. End-of-Write Detection SST26VF032B/032BA significantly improve performance - Software polling the BUSY bit in status register and reliability, while lowering power consumption. These Flexible Erase Capability devices write (Program or Erase) with a single power supply - Uniform 4 KByte sectors of 2.3-3.6V. The total energy consumed is a function of the - Four 8 KByte top and bottom parameter overlay applied voltage, current, and time of application. Since for blocks any given voltage range, the SuperFlash technology uses - One 32 KByte top and bottom overlay block less current to program and has a shorter erase time, the - Uniform 64 KByte overlay blocks total energy consumed during any Erase or Program opera- Write-Suspend tion is less than alternative flash memory technologies. - Suspend Program or Erase operation to access SST26VF032B/032BA are offered in 8-contact WDFN another block/sector (6 mm x 5 mm), 8-lead SOIJ (5.28 mm), and 24-ball Software Reset (RST) mode TBGA(6mm x 8mm). See Figure 2-2 for pin assignments. Software Write Protection Two configurations are available upon order. - Individual-Block Write Protection with permanent SST26VF032B default at power-up has the WP# and lock-down capability HOLD# pins enabled, and the SIO2 and SIO3 pins dis- - 64 KByte blocks, two 32 KByte blocks, and abled, to initiate SPI-protocol operations. eight 8 KByte parameter blocks SST26VF032BA default at power-up has the WP# and HOLD# pins disabled, and the SIO2 and SIO3 pins - Read Protection on top and bottom 8 KByte parameter blocks 2013-2019 Microchip Technology Inc. DS20005218G-page 1SST26VF032B / SST26VF032BA enabled, to initiate Quad I/O operations. See I/O Con- figuration (IOC) on page 13 for more information about configuring WP#/HOLD# and SIO2/SIO3 pins. DS20005218G-page 2 2013-2019 Microchip Technology Inc.

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
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