SY58606UMG-TR Microchip

SY58606U 4.25 Gbps Precision, 1:2 CML Fanout Buffer with Internal Termination and Fail Safe Input Features General Description Precision 1:2, 400 mV CML Fanout Buffer The SY58606U is a 2.5/3.3V, high-speed, fully differential 1:2 CML fanout buffer optimized to provide Guaranteed AC Performance over Temperature two identical output copies with less than 15 ps of skew and Voltage: and 100 fs of typical additive phase jitter. The RMS - DC-to >4.25 Gbps Throughput SY58606U can process clock signals as fast as 3 GHz - <320 ps Propagation Delay (IN-to-Q) or data patterns up to 4.25 Gbps. - <15 ps Within-Device Skew The differential input includes Microchips unique, - <85 ps Rise/Fall Times 3-lead input termination architecture that interfaces to Fail Safe Input LVPECL, LVDS, or CML differential signals, (AC- or - Prevents Outputs From Oscillating When DC-coupled) as small as 100 mV (200 mV ) without PP Input is Invalid any level-shifting or termination resistor networks in the signal path. For AC-coupled input interface Ultra-Low Jitter Design applications, an integrated voltage reference (V ) - 100 fs Typical Additive Jitter REF-AC RMS is provided to bias the V pin. The outputs are 400 mV T High-Speed CML Outputs CML, with extremely fast rise/fall times guaranteed to 2.5V 5% or 3.3V 10% Power Supply Operation be less than 85 ps. Industrial Temperature Range: 40C to +85C The SY58606U operates from a 2.5V 5% supply or Available In 16-lead (3 mm x 3 mm) QFN 3.3V 10% supply and is guaranteed over the full Package industrial temperature range (40C to +85C). For applications that require LVPECL or LVDS outputs, Applications consider Microchips SY58607U and SY58608U, 1:2 fanout buffers with 800 mV and 325 mV output swings Data Distribution: OC-48, OC-48+FEC, XAUI respectively. The SY58606U is part of Microchips SONET Clock and Data Distribution high-speed, Precision Edge product line. Fibre Channel Clock and Data Distribution Gigabit Ethernet Clock And Data Distribution Markets Package Type Storage SY58606U ATE 3 mm x 3 mm QFN-16 (M) Test and Measurement (Top View) Enterprise Networking Equipment High-End Servers Access Metro Area Network Equipment 16 15 14 13 IN 1 12 Q0 VT 2 11 /Q0 Q1 VREF-AC 3 10 /IN 4 9 /Q1 5 6 7 8 United States Patent No. RE44,134 2019 Microchip Technology Inc. 1DS20006199A-page VCC VCC GND GND GND GND VCC VCCSY58606U Functional Block Diagram Q0 IN /Q0 50 VT 50 Q1 /IN /Q1 VREF-AC 2DS20006199A-page 2019 Microchip Technology Inc.