VX-805 Voltage Controlled Crystal Oscillator VX-805 Description The VX-805 is a Voltage Control Crystal Oscillator that operates at the fundamental frequency of the internal crystal. The crystal is a high-Q quartz device that enables the circuit to achieve low phase noise jitter performance over a wide operating temperature range. The VX-805 is housed in an industry standard hermetically sealed LCC package and is available in tape and reel. Features Applications CMOS output VCXO, 30-170MHz 5G LVPECL output VCXO, 100 - 204.8 MHz LTE LVDS output VCXO, 60 - 200 MHz SONET/SDH/DWDM 3.3 V Operation, 2.5 V LVDS Ethernet, SyncE, GE Fundamental Crystal Design with Low Jitter Performance xDSL, PCMIA Output Disable Feature Digital Video Excellent 20 ppm Temperature Stability Broadband Access 0/70C, -40/85C or -40/105C Operating Temperature Base Stations, Picocells Small Industry Standard 5.0x3.2 mm Package Product is free of lead and compliant to EC RoHS Directive Block Diagram V OUT OUT DD (LVPECL, LVDS) XTAL Vc E/D Gnd Figure 1. Block Diagram P age1 Performance Speci cations Performance Speci cations Table 1. Electrical Performance - 3.3V CMOS Parameter Symbol Min Typical Maximum Units Supply 1 Voltage V 3.135 3.3 3.465 V DD 2 Current , f < 100MHz I 15 mA out DD f 100MHz 25 mA out Frequency 3 Nominal Frequency f 30 170 MHz N 2,6 Absolute Pull Range , ordering option APR 30 or 50 ppm 2 Linearity Lin 5 % 2, Gain Transfer 77.76MHz K +100 ppm/V V Temperature Stability f 20 ppm STAB Outputs 2 Output Logic Levels Output Logic High V V -0.4 V OH DD Output Logic Low V 0.4 V OL Output Drive Levels I OUT I -4 mA OH I 4 mA OL I f 100MHz -8 mA OH out I f 100MHz 8 mA OL out Load t 15 pF R 2,4 Rise/Fall Time t 3 ns F f > 100MHz 2.4 O 2 Symmetry SYM 45 50 55 % 8 Phase Noise (122.88 MHz) dBc/Hz 10Hz -66 100Hz -98 1kHz -124 10kHz -138 100kHz -151 1MHz -158 10MHz -161 Control Voltage Control Voltage Range for Pull Range V 0.3 3.0 V C Control Voltage Input Impedance Z 10 M IN Control Voltage Modulation BW BW 20 kHz 9 Output Enable/Disable V Output Enabled V 0.7*V IH DD Output Disabled V 0.3*V IL DD 9 Start-Up and Enable Time T 10 ms S Disable Time 200 ns Operating Temp, Ordering Option T 0/70, -20/70 or -40/85 C OP Package Size 5.0 x 3.2 x 1.2 mm 1 The power supply should have by-pass capacitors as close to the supply and to ground as possible, for examples 0.1 and 0.01uF 2 Parameters are tested with production test circuit as shown in Figure 2. 3 See Standard Frequencies and Ordering Information tables for more speci c information 4 Measured from 20% to 80% of a full output swing as shown in Figure 5. 5 Not tested in production, guaranteed by design, veri ed at quali cation. 6 Tested with Vc = 0.3V to 3.0V unless otherwise stated in part description 7 Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples. 8 Phase Noise is measured with an Agilent E5052A. 9 The Output is Enabled if the Enable/Disable is left open. The output will be glitch-free upon start up and enable. P age2