Product Information

N25Q512A13G1240E

N25Q512A13G1240E electronic component of Micron

Datasheet
NOR Flash Serial (SPI, Dual SPI, Quad SPI) 3V 512M-bit 512M/256M/128M x 1/2-bit/4-bit 24-Pin TBGA Tray

Manufacturer: Micron
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 7.487 ea
Line Total: USD 7.49

0 - Global Stock
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
0 - WHS 1


Ships to you between Tue. 21 May to Mon. 27 May

MOQ : 1
Multiples : 1
1 : USD 7.487

0 - WHS 2


Ships to you between Tue. 21 May to Mon. 27 May

MOQ : 4
Multiples : 1
4 : USD 14.5172
10 : USD 13.0428
25 : USD 11.8865
50 : USD 11.632

     
Manufacturer
Product Category
Mounting Style
Package / Case
Interface Type
Timing Type
Supply Voltage - Min
Supply Voltage - Max
Supply Current - Max
Minimum Operating Temperature
Maximum Operating Temperature
Packaging
Address Bus
Boot Type
Cell Type
Operating Temp Range
Pin Count
Program/Erase Volt Typ
Density
Operating Temperature Classification
Programmable
Rad Hardened
Operating Supply Voltage Typ
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512Mb, Multiple I/O Serial Flash Memory Features Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase N25Q512A13G1240x, N25Q512A13GSF40x, N25Q512A13GF840x N25Q512A83G1240x, N25Q512A83GSF40x, N25Q512A13GSFA0F Write protection Features Software write protection applicable to every Stacked device (two 256Mb die) 64KB sector via volatile lock bit SPI-compatible serial bus interface Hardware write protection: protected area size Double transfer rate (DTR) mode defined by five nonvolatile bits (BP0, BP1, BP2, 2.73.6V single supply voltage BP3, and TB) 108 MHz (MAX) clock frequency supported for all Additional smart protections, available upon re- protocols in single transfer rate (STR) mode quest 54 MHz (MAX) clock frequency supported for all Electronic signature protocols in DTR mode JEDEC-standard 2-byte signature (BA20h) Dual/quad I/O instruction provides increased Unique ID code (UID): 17 read-only bytes, throughput up to 54 MB/s including: Two additional extended device ID Supported protocols bytes to identify device factory options and cus- Extended SPI, dual I/O, and quad I/O tomized factory data (14 bytes) DTR mode supported on all Minimum 100,000 ERASE cycles per sector Execute-in-place (XIP) mode for all three protocols More than 20 years data retention Configurable via volatile or nonvolatile registers Packages JEDEC-standard, all RoHS-compliant Enables memory to work in XIP mode directly af- V-PDFN-8/8mm x 6mm (also known as SON, ter power-on DFPN, MLP, MLF) PROGRAM/ERASE SUSPEND operations SOP2-16/300mils (also known as SO16W, SO16- Available protocols Wide, SOIC-16) Available READ operations T-PBGA-24b05/6mm x 8mm (also known as Quad or dual output fast read TBGA24) Quad or dual I/O fast read 1. Part numbers: N25Q512A83G1240X, Note: Flexible to fit application N25Q512A83GSF40X Configurable number of dummy cycles Output buffer configurable Software reset 1 Additional reset pin for selected part numbers 3-byte and 4-byte addressability mode supported 64-byte, user-lockable, one-time programmable (OTP) dedicated area Erase capability Subsector erase 4KB uniform granularity blocks Sector erase 64KB uniform granularity blocks Single die erase PDF: 09005aef84752721 Micron Technology, Inc. reserves the right to change products or specifications without notice. 1 n25q 512mb 1ce 3V 65nm.pdf - Rev. M 12/12 EN 2011 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice.512Mb, Multiple I/O Serial Flash Memory Features Contents Device Description ........................................................................................................................................... 6 Features ....................................................................................................................................................... 6 3-Byte Address and 4-Byte Address Modes ..................................................................................................... 6 Operating Protocols ...................................................................................................................................... 6 XIP Mode ..................................................................................................................................................... 7 Device Configurability .................................................................................................................................. 7 Signal Assignments ........................................................................................................................................... 8 Signal Descriptions ......................................................................................................................................... 10 Memory Organization .................................................................................................................................... 12 Memory Configuration and Block Diagram .................................................................................................. 12 Memory Map 512Mb Density ....................................................................................................................... 13 Device Protection ........................................................................................................................................... 14 Serial Peripheral Interface Modes .................................................................................................................... 16 SPI Protocols .................................................................................................................................................. 18 Nonvolatile and Volatile Registers ................................................................................................................... 19 Status Register ............................................................................................................................................ 20 Nonvolatile and Volatile Configuration Registers .......................................................................................... 21 Extended Address Register .......................................................................................................................... 24 Enhanced Volatile Configuration Register .................................................................................................... 25 Flag Status Register ..................................................................................................................................... 26 Command Definitions .................................................................................................................................... 28 READ REGISTER and WRITE REGISTER Operations ........................................................................................ 32 READ STATUS REGISTER or FLAG STATUS REGISTER Command ................................................................ 32 READ NONVOLATILE CONFIGURATION REGISTER Command ................................................................... 33 READ VOLATILE or ENHANCED VOLATILE CONFIGURATION REGISTER Command .................................. 33 READ EXTENDED ADDRESS REGISTER Command ..................................................................................... 34 WRITE STATUS REGISTER Command ......................................................................................................... 34 WRITE NONVOLATILE CONFIGURATION REGISTER Command ................................................................. 35 WRITE VOLATILE or ENHANCED VOLATILE CONFIGURATION REGISTER Command ................................. 35 WRITE EXTENDED ADDRESS REGISTER Command ................................................................................... 36 READ LOCK REGISTER Command .............................................................................................................. 36 WRITE LOCK REGISTER Command ............................................................................................................ 38 CLEAR FLAG STATUS REGISTER Command ................................................................................................ 39 READ IDENTIFICATION Operations ............................................................................................................... 40 READ ID and MULTIPLE I/O READ ID Commands ...................................................................................... 40 READ SERIAL FLASH DISCOVERY PARAMETER Command ......................................................................... 41 READ MEMORY Operations ............................................................................................................................ 45 3-Byte Address ........................................................................................................................................... 45 4-Byte Address ........................................................................................................................................... 46 READ MEMORY Operations Timing Single Transfer Rate ........................................................................... 48 READ MEMORY Operations Timing Double Transfer Rate ......................................................................... 51 PROGRAM Operations .................................................................................................................................... 54 WRITE Operations .......................................................................................................................................... 59 WRITE ENABLE Command ......................................................................................................................... 59 WRITE DISABLE Command ........................................................................................................................ 59 ERASE Operations .......................................................................................................................................... 61 SUBSECTOR ERASE Command ................................................................................................................... 61 SECTOR ERASE Command ......................................................................................................................... 61 DIE ERASE Command ................................................................................................................................ 62 BULK ERASE Command ............................................................................................................................. 63 PDF: 09005aef84752721 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2 n25q 512mb 1ce 3V 65nm.pdf - Rev. M 12/12 EN 2011 Micron Technology, Inc. All rights reserved.

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
EL9
Elpida Memory
ELPIDA MEMORY INC
IE6
MI9
MICRON SEMICONDUCTOR
Micron Tech
MICRON TECHNOLOGY
Micron Technology Inc
Micron Technology Inc.
NU9
Numonyx - A DIVISION OF MICRON SEMICONDUCTOR PRODUCTS, INC. (VA)

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