74AHC02 74AHCT02 Quad 2-input NOR gate Rev. 5 11 May 2020 Product data sheet 1. General description The 74AHC02 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC02 74AHCT02 provides a quad 2-input NOR function. 2. Features and benefits Balanced propagation delays All inputs have a Schmitt-trigger action Inputs accept voltages higher than V CC Input levels: For 74AHC02: CMOS level For 74AHCT02: TTL level ESD protection: HBM EIA/JESD22-A114E exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101C exceeds 1000 V Multiple package options Specified from -40 C to +85 C and from -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC02D -40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74AHCT02D 74AHC02PW -40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74AHCT02PW 74AHC02BQ -40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package no leads 14 terminals 74AHCT02BQ body 2.5 3 0.85 mmNexperia 74AHC02 74AHCT02 Quad 2-input NOR gate 4. Functional diagram 2 2 1A 1 1 1Y 1 3 3 1B 5 5 2A 1 2Y 4 4 6 6 2B 8 3A 8 3Y 10 1 10 9 3B 9 A 11 4A 11 4Y 13 Y 1 12 4B 13 12 B mna216 001aah084 mna215 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram (one gate) 5. Pinning information 5.1. Pinning terminal 1 index area 2 13 1A 4Y 1B 3 12 4B 2Y 4 02 11 4A 2A 5 (1) 10 3Y GND 1Y 1 14 V CC 2B 6 9 3B 1A 2 13 4Y 1B 3 12 4B 001aac920 2Y 4 02 11 4A 2A 5 10 3Y Transparent top view 2B 6 9 3B (1) This is not a ground pin. There is no electrical or GND 7 8 3A mechanical requirement to solder the pad. In case 001aac919 soldered, the solder land should remain floating or connected to GND. Fig. 4. Pin configuration SOT108-1 (SO14) and SOT402-1 (TSSOP14) Fig. 5. Pin configuration SOT762-1 (DHVQFN14) 5.2. Pin description Table 2. Pin description Symbol Pin Description 1Y, 2Y, 3Y, 4Y 1, 4, 10, 13 data output 1A, 2A, 3A, 4A 2, 5, 8, 11 data input 1B, 2B, 3B, 4B 3, 6, 9, 12 data input GND 7 ground (0 V) V 14 supply voltage CC 74AHC AHCT02 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 5 11 May 2020 2 / 12 GND 7 1 1Y 3A 8 14 V CC