74AHC157PW,112

74AHC157-Q100 74AHCT157-Q100 Quad 2-input multiplexer Rev. 2 10 September 2020 Product data sheet 1. General description The 74AHC/AHCT157-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low Power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74AHC/AHCT157-Q100 are quad 2-input multiplexer which select 4 bits of data from two sources under the control of a common data select input (S). The enable input (E) is active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all other input conditions. Moving the data from two groups of registers to four common output buses is a common use of the 74AHC/AHCT157-Q100. The state of the common data select input (S) determines the particular register from which the data comes. It can also be used as function generator. The device is useful for implementing highly irregular logic by generating any four of the 16 different functions of two variables with one variable common. The 74AHC/AHCT157-Q100 is logic implementation of a 4-pole, 2-position switch, where the position of the switch is determine by the logic levels applied to S. The logic equations are: 1Y = E (1I1 S + 1I0 S) 2Y = E (2I1 S + 2I0 S) 3Y = E (3I1 S + 3I0 S) 4Y = E (4I1 S + 4I0 S) This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Balanced propagation delays All inputs have a Schmitt-trigger action Inputs accepts voltages higher than V CC Multiple input enable for easy expansion Ideal for memory chip select decoding For 74AHC157-Q100 only: operates with CMOS input levels For 74AHCT157-Q100 only: operates with TTL input levels ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder jointsNexperia 74AHC157-Q100 74AHCT157-Q100 Quad 2-input multiplexer 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC157D-Q100 -40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74AHCT157D-Q100 74AHC157PW-Q100 -40 C to +125 C TSSOP16 plastic thin shrink small outline package SOT403-1 16 leads body width 4.4 mm 74AHCT157PW-Q100 74AHC157BQ-Q100 -40 C to +125 C DHVQFN16 plastic dual in-line compatible SOT763-1 thermal enhanced very thin quad 74AHCT157BQ-Q100 flat package no leads 16 terminals body 2.5 3.5 0.85 mm 4. Functional diagram S E 1I1 1Y 1I0 2I1 2Y 2I0 2 3 5 6 11 10 14 13 3I1 3Y 1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1 3I0 1 S 15 E 4I1 1Y 2Y 3Y 4Y 4Y 4 7 9 12 4I0 mna484 mna481 Fig. 1. Logic diagram Fig. 2. Logic symbol 74AHC AHCT157 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 2 10 September 2020 2 / 15