74AHCT138PW,112

74AHC138 74AHCT138 3-to-8 line decoder/demultiplexer inverting Rev. 5 10 September 2020 Product data sheet 1. General description The 74AHC138 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC138 74AHCT138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive outputs (Y0 to Y7) that are LOW when selected. There are three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four 74AHC138 74AHCT138 devices and one inverter. The 74AHC138 74AHCT138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state. 2. Features and benefits Balanced propagation delays All inputs have Schmitt-trigger action Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Inputs accepts voltages higher than V CC For 74AHC138 only: operates with CMOS input levels For 74AHCT138 only: operates with TTL input levels ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101C exceeds 1000 V Multiple package options Specified from -40 C to +85 C and from -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC138D -40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74AHCT138D 74AHC138PW -40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74AHCT138PW 74AHC138BQ -40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced SOT763-1 very thin quad flat package no leads 16 terminals 74AHCT138BQ body 2.5 3.5 0.85 mmNexperia 74AHC138 74AHCT138 3-to-8 line decoder/demultiplexer inverting 4. Functional diagram DX 15 X/Y 15 0 0 1 1 14 14 0 1 1 1 2 13 2 13 0 G 2 1 A0 Y0 15 2 2 7 3 12 3 12 Y1 14 2 A1 2 3 4 3 11 11 3 A2 Y2 13 4 4 Y3 12 10 10 4 4 & & 5 5 11 E1 Y4 4 9 9 5 5 6 6 10 Y5 E2 EN 5 7 7 6 6 7 7 Y6 9 E3 6 7 Y7 mna371 mna370 (a) (b) Fig. 1. Logic symbol Fig. 2. IEC logic symbol Y0 15 1 A0 Y1 14 A1 2 Y2 13 A2 3 Y3 12 3-to-8 ENABLE Y4 11 DECODER EXITING Y5 10 Y6 9 Y7 7 4 E1 5 E2 6 E3 mna372 Fig. 3. Functional diagram 74AHC AHCT138 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 5 10 September 2020 2 / 15