Product Information

74AHCT373D,118

74AHCT373D,118 electronic component of Nexperia

Datasheet
Latches OCTAL 3-STATE LATCH
Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

2000: USD 0.1776 ea
Line Total: USD 355.2

0 - Global Stock
MOQ: 2000  Multiples: 2000
Pack Size: 2000

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Availability Price Quantity
0 - WHS 1


Ships to you between Wed. 22 May to Tue. 28 May

MOQ : 1
Multiples : 1

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74AHCT373D,118
Nexperia

1 : USD 0.7366
10 : USD 0.632
100 : USD 0.4721

0 - WHS 2


Ships to you between Wed. 22 May to Tue. 28 May


Multiples : 1

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74AHCT373D,118
Nexperia


0 - WHS 3


Ships to you between Wed. 22 May to Tue. 28 May


Multiples : 1

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74AHCT373D,118
Nexperia


0 - WHS 4


Ships to you between Wed. 22 May to Tue. 28 May

MOQ : 2000
Multiples : 2000

Stock Image

74AHCT373D,118
Nexperia

2000 : USD 0.1776
6000 : USD 0.1725

Read More Specifications

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Number of Circuits
Logic Type
Logic Family
Polarity
Number of Output Lines
High Level Output Current
Propagation Delay Time
Supply Voltage - Max
Supply Voltage - Min
Minimum Operating Temperature
Maximum Operating Temperature
Packaging
Package Case
Brand
Mounting Style
Number Of Input Lines
Factory Pack Quantity :
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Additional Infomation About Product

74AHC373 74AHCT373 Octal D-type transparant latch 3-state Rev. 03 20 May 2008 Product data sheet 1. General description The 74AHC373 74AHCT373 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specied in compliance with JEDEC standard No. 7-A. The 74AHC373 74AHCT373 consists of eight D-type transparent latches featuring separate D-type inputs for each latch and 3-state true outputs for bus oriented applications. A latch enable input (LE) and an output enable input (OE) are common to all latches. When pin LE is HIGH, data at the Dn inputs enters the latches. In this condition the latches are transparent, i.e. a latch output will change state each time its corresponding Dn input changes. When pin LE is LOW, the latches store the information that is present at the Dn inputs, after a set-up time preceding the HIGH-to-LOW transition of LE. When pin OE is LOW, the contents of the 8 latches are available at the outputs. When pin OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. The 74AHC373 74AHCT373 is functionally identical to the 74AHC573 74AHCT573, but has a different pin arrangement. 2. Features n Balanced propagation delays n All inputs have a Schmitt-trigger action n Common 3-state output enable input n Inputs accepts voltages higher than V CC n Functionally identical to the 74AHC573 74AHCT573 n Input levels: u For 74AHC373: CMOS input level u For 74AHCT373: TTL input level n ESD protection: u HBM EIA/JESD22-A114E exceeds 2000 V u MM EIA/JESD22-A115-A exceeds 200 V u CDM EIA/JESD22-C101C exceeds 1000 V n Multiple package options n Specied from - 40 C to +85 C and from - 40 C to +125 C74AHC373 74AHCT373 NXP Semiconductors Octal D-type transparant latch 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC373 74AHC373D - 40 C to +125 C SO20 plastic small outline package 20 leads SOT163-1 body width 7.5 mm 74AHC373PW - 40 C to +125 C TSSOP20 plastic thin shrink small outline package 20 leads SOT360-1 body width 4.4 mm 74AHCT373 74AHCT373D - 40 C to +125 C SO20 plastic small outline package 20 leads SOT163-1 body width 7.5 mm 74AHCT373PW - 40 C to +125 C TSSOP20 plastic thin shrink small outline package 20 leads SOT360-1 body width 4.4 mm 4. Functional diagram D0 Q0 3 2 D1 Q1 4 5 D2 Q2 7 6 D3 Q3 8 9 LATCH 3-STATE D4 Q4 1 TO 8 OUTPUTS 13 12 D5 Q5 14 15 D6 Q6 17 16 D7 Q7 18 19 LE 11 OE 1 001aae050 Fig 1. Functional diagram 74AHC AHCT373 3 NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 20 May 2008 2 of 17

HS Compliance

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

Nexperia may also be referenced as

Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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