Product Information

74ALVC08PW,112

74ALVC08PW,112 electronic component of Nexperia

Datasheet
Logic Gates 3.3V QUAD 2-INPUT

Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete
Availability Price Quantity
0 - WHS 1

MOQ : 2400
Multiples : 1

Stock Image

74ALVC08PW,112
Nexperia

2400 : USD 0.176
2500 : USD 0.1635
10000 : USD 0.144
N/A

Obsolete
0 - WHS 2

MOQ : 1
Multiples : 1

Stock Image

74ALVC08PW,112
Nexperia

1 : USD 0.7299
10 : USD 0.6223
96 : USD 0.3645
576 : USD 0.2926
1056 : USD 0.2375
2592 : USD 0.2099
5088 : USD 0.1974
N/A

Obsolete
     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Product
Logic Function
Logic Family
Number of Gates
Number of Input Lines
Number of Output Lines
High Level Output Current
Low Level Output Current
Propagation Delay Time
Supply Voltage - Max
Supply Voltage - Min
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Function
Height
Length
Quiescent Current
Width
Brand
Logic Type
Operating Supply Voltage
Factory Pack Quantity :
Cnhts
Hts Code
Mxhts
Product Type
Subcategory
Taric
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74ALVC08 Quad 2-input AND gate Rev. 4 30 April 2021 Product data sheet 1. General description The 74ALVC08 is a quad 2-input AND gate. This device is fully specified for partial power down applications using I . The I circuitry disables the output, preventing the potentially damaging OFF OFF backflow current through the device when it is powered down. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. 2. Features and benefits Wide supply voltage range from 1.65 V to 3.6 V 3.6 V tolerant inputs/outputs CMOS low power consumption Direct interface with TTL levels (2.7 V to 3.6 V) Power-down mode Latch-up performance exceeds 250 mA Complies with JEDEC standards: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B (2.7 V to 3.6 V) ESD protection: MM JESD22-A115-A exceeds 200 V HBM JESD22-A114E exceeds 2000 V Multiple package options Specified from -40 C to +85 CNexperia 74ALVC08 Quad 2-input AND gate 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74ALVC08D -40 C to +85 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74ALVC08PW -40 C to +85 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74ALVC08BQ -40 C to +85 C DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package no leads 14 terminals body 2.5 3 0.85 mm 4. Functional diagram 1 & 3 2 4 & 6 1 1A 1Y 3 5 2 1B 4 2A 2Y 6 9 5 2B & 8 10 9 3A 3Y 8 10 3B A 12 12 4A & 4Y 11 11 Y 13 4B 13 B mna222 mna223 mna221 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram (one gate) 5. Pinning information 5.1. Pinning 74ALVC08 1 14 1A V CC 74ALVC08 1B 2 13 4B 1A 1 14 V 1Y 3 12 4A CC 1B 2 13 4B 2A 4 11 4Y 1Y 3 12 4A 2A 4 11 4Y 2B 5 10 3B 2B 5 10 3B 6 9 2Y 3A 2Y 6 9 3A GND 7 8 3Y GND 7 8 3Y aaa-27559 aaa-027560 Fig. 4. Pin configuration SOT108-1 (SO14) Fig. 5. Pin configuration SOT402-1 (TSSOP14) 74ALVC08 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 4 30 April 2021 2 / 13

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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