74AXP2T08-Q100 Dual supply, dual 2-input AND gate Rev. 2 27 March 2019 Product data sheet 1. General description The 74AXP2T08-Q100 is a dual supply, dual 2-input AND gate. It features four inputs (nA and nB), two outputs (nY) and dual supply pins (V and V ). The inputs are referenced to V and CCI CCO CCI the outputs are referenced to V . All inputs can be connected directly to V or GND. V can CCO CCI CCI be supplied at any voltage between 0.7 V and 2.75 V and V can be supplied at any voltage CCO between 1.2 V and 5.5 V. This feature allows voltage level translation. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire supply range and is fully specified for partial power down applications using I . The I circuitry OFF OFF disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range: V : 0.7 V to 2.75 V CCI V : 1.2 V to 5.5 V CCO Low input capacitance C = 0.6 pF (typical) I Low output capacitance C = 1.8 pF (typical) O Low dynamic power consumption C = 0.5 pF at V = 1.2 V (typical) PD CCI Low dynamic power consumption C = 7.1 pF at V = 3.3 V (typical) PD CCO Low static power consumption I = 0.5 A (85 C maximum) CCI Low static power consumption I = 1.8 A (85 C maximum) CCO High noise immunity Complies with JEDEC standard: JESD8-12A.01 (1.1 V to 1.3 V nA, nB inputs) JESD8-11A.01 (1.4 V to 1.6 V) JESD8-7A (1.65 V to 1.95 V) JESD8-5A.01 (2.3 V to 2.7 V) JESD8-C (2.7 V to 3.6 V nY outputs) JESD12-6 (4.5 V to 5.5 V nY outputs) ESD protection: MIL-STD-883, method 3015 Class 2. Exceeds 2 kV HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV CDM JESD22-C101E exceeds 1000 V Latch-up performance exceeds 100 mA per JESD78D Class II Inputs accept voltages up to 2.75 V Low noise overshoot and undershoot < 10% of V CCO I circuitry provides partial power-down mode operation OFFNexperia 74AXP2T08-Q100 Dual supply, dual 2-input AND gate 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AXP2T08DP-Q100 -40 C to +125 C TSSOP10 plastic thin shrink small outline package 10 leads SOT552-1 body width 3 mm 4. Marking Table 2. Marking Type number Marking code 1 74AXP2T08DP-Q100 r8 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1A 1Y 1B 1A 1Y 1B 2A 2Y 2B 2A 2Y V V CCI CCO 2B aaa-018933 aaa-018934 Fig. 1. Logic symbol Fig. 2. Logic diagram 74AXP2T08 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 2 27 March 2019 2 / 15