74HC132D,653

74HC132 74HCT132 Quad 2-input NAND Schmitt trigger Rev. 7 13 August 2021 Product data sheet 1. General description The 74HC132 74HCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . Schmitt trigger inputs transform slowly changing input signals into sharply defined CC jitter-free output signals. 2. Features and benefits Wide supply voltage range from 2.0 to 6.0 V CMOS low power dissipation High noise immunity Unlimited input rise and fall times Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C 3. Applications Wave and pulse shapers Astable multivibrators Monostable multivibrators 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC132D -40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74HCT132D 74HC132PW -40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74HCT132PW 74HC132BQ -40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package no leads 14 terminals body 2.5 3 0.85 mmNexperia 74HC132 74HCT132 Quad 2-input NAND Schmitt trigger 5. Functional diagram 1A 1 1Y 3 1B 2 2A 4 1 2Y 6 & 3 2B 2 5 4 & 3A 6 9 5 3Y 8 3B 9 10 & 8 10 A 4A 12 Y 12 4Y & 11 11 B 13 4B mna409 13 mna407 mna408 Fig. 3. Logic diagram Fig. 1. Logic symbol Fig. 2. IEC logic symbol (one Schmitt trigger) 6. Pinning information 6.1. Pinning 74HC132 terminal 1 index area 1B 2 13 4B 1Y 3 12 4A 74HC132 74HCT132 4 11 2A 4Y 2B 5 (1) 10 3B GND 1A 1 14 V CC 2Y 6 9 3A 1B 2 13 4B 1Y 3 12 4A 2A 4 11 4Y aaa-030172 2B 5 10 3B Transparent top view 2Y 6 9 3A (1) This is not a ground pin. There is no electrical or GND 7 8 3Y mechanical requirement to solder the pad. In case aaa-031632 soldered, the solder land should remain floating or connected to GND. Fig. 4. Pin configuration SOT108-1 (SO14) and SOT402-1 (TSSOP14) Fig. 5. Pin configuration SOT762-1 (DHVQFN14) 74HC HCT132 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 7 13 August 2021 2 / 16 GND 7 1 1A 3Y 8 14 V CC