Product Information

74HCT10D

74HCT10D electronic component of Nexperia

Datasheet
Logic Gates TRIPLE 3-INPUT NAND GATE
Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

5: USD 0.5341 ea
Line Total: USD 2.67

0 - Global Stock
MOQ: 5  Multiples: 1
Pack Size: 1

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Ships to you between Fri. 17 May to Thu. 23 May

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74HCT10D
Nexperia

5 : USD 0.5112
114 : USD 0.3661
513 : USD 0.2875
1026 : USD 0.2219
2508 : USD 0.1937
5016 : USD 0.1843

Read More Specifications

     
Manufacturer
Product Category
Package / Case
Brand
Logic Family / Base Number
Logic Type
Output Current
No. Of Inputs
Supply Voltage Min
Supply Voltage Max
Logic Case Style
No. Of Pins
Logic Ic Family
Logic Ic Base Number
Operating Temperature Min
Operating Temperature Max
Rohs Phthalates Compliant
Msl
Svhc
Base Number
Ic Generic Number
Logic Function Number
Logic Ic Function
Operating Temperature Range
Supply Voltage
Supply Voltage Range
Termination Type
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Additional Infomation About Product

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT10 Triple 3-input NAND gate December 1990 Product specication File under Integrated Circuits, IC06Philips Semiconductors Product specication Triple 3-input NAND gate 74HC/HCT10 FEATURES Output capability: standard I category: SSI CC GENERAL DESCRIPTION The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT10 provide the 3-input NAND function. QUICK REFERENCE DATA GND = 0 V T =25C t =t = 6 ns amb r f TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC HCT t / t propagation delay nA, nB, nC to nY C = 15 pF V =5V 9 11 ns PHL PLH L CC C input capacitance 3.5 3.5 pF I C power dissipation capacitance per gate notes 1 and 2 12 14 pF PD Notes 1. C is used to determine the dynamic power dissipation (P in W): PD D 2 2 P =C V f + (C V f ) where: D PD CC i L CC O f = input frequency in MHz i f = output frequency in MHz o C = output load capacitance in pF L V = supply voltage in V CC 2 (C V f ) = sum of outputs L CC o 2. For HC the condition is V = GND to V I CC For HCT the condition is V = GND to V - 1.5 V. I CC ORDERING INFORMATION See 74HC/HCT/HCU/HCMOS Logic Package Information. December 1990 2

HS Compliance

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

Nexperia may also be referenced as

Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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