74HCT251PW,112

74HC251 74HCT251 8-input multiplexer 3-state Rev. 6 8 February 2021 Product data sheet 1. General description The 74HC251 74HCT251 is an 8-bit multiplexer with eight binary inputs (I0 to I7), three select inputs (S0 to S2) and an output enable input (OE). The select inputs select one of the eight binary inputs and route it to the complementary outputs (Y and Y). A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of V . CC 2. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V CMOS low power dissipation High noise immunity Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) Input levels: For 74HC251: CMOS level For 74HCT251: TTL level Non-inverting data path ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Specified from -40 C to +85 C and from -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC251D -40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74HCT251D 74HC251PW -40 C to +125 C TSSOP16 plastic thin shrink small outline package SOT403-1 16 leads body width 4.4 mm 74HCT251PWNexperia 74HC251 74HCT251 8-input multiplexer 3-state 4. Functional diagram 4 3 2 1 15 14 13 12 I0 I1 I2 I3 I4 I5 I6 I7 S0 11 S1 MULTIPLEXER 10 4 3 2 1 15 14 13 12 S2 9 I0 I1 I2 I3 I4 I5 I6 I7 OE 7 Y 5 7 OE Y 6 S0 S1 S2 Y Y aaa-008235 11 10 9 5 6 aaa-008236 Fig. 1. Logic symbol Fig. 2. Functional diagram I7 I6 I5 I4 Y I3 I2 Y I1 I0 S2 S1 S0 OE aaa-008237 Fig. 3. Logic diagram 74HC HCT251 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 6 8 February 2021 2 / 16