74LVC08APW-Q100,11 Nexperia

74LVC08A-Q100 Quad 2-input AND gate Rev. 2 19 April 2016 Product data sheet 1. General description The 74LVC08A-Q100 provides four 2-input AND gates. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C 5 V tolerant inputs for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption Direct interface with TTL levels Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Multiple package options74LVC08A-Q100 Nexperia Quad 2-input AND gate 3. Ordering information Table 1. Ordering information Type number Package Temperature Name Description Version range 74LVC08AD-Q100 40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74LVC08APW-Q100 40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74LVC08ABQ-Q100 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1 thin quad flat package no leads 14 terminals body 2.5 3 0.85 mm 4. Functional diagram < < < < < % Q P QD P D PQ Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram for one gate 74LVC08A Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 2 19 April 2016 2 of 14 D % % % %