HEF4049BT,652

HEF4049B Hex inverting buffers Rev. 11 23 June 2016 Product data sheet 1. General description The HEF4049B provides six inverting buffers with high current output capability suitable for driving TTL or high capacitive loads. Since input voltages in excess of the buffers supply voltage are permitted, the buffers may also be used to convert logic levels of up to 15 V to standard TTL levels. Their guaranteed fan-out into common bipolar logic elements is shown in Table 3. It operates over a recommended V power supply range of 3 V to 15 V referenced to V DD SS (usually ground). Unused inputs must be connected to V , V , or another input. DD SS 2. Features and benefits Accepts input voltages in excess of the supply voltage Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from 40 C to +85 C Complies with JEDEC standard JESD 13-B 3. Applications LOCMOS (Local Oxidation CMOS) to DTL/TTL converter HIGH sink current for driving two TTL loads HIGH-to-LOW level logic conversion 4. Ordering information Table 1. Ordering information All types operate from 40 C to +85 C. Type number Package Name Description Version HEF4049BT SO16 plastic small outline package 16 leads body width 3.9 mm SOT109-1HEF4049B Nexperia Hex inverting buffers 5. Functional diagram LQSXW < 9 DDL Q P Fig 1. Logic symbol Fig 2. Logic diagram for one gate Fig 3. Input protection circuit HEF4049B All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 11 23 June 2016 2 of 12 DDH D 66 < < < < < <