HEF4077B Quad 2-input EXCLUSIVE-NOR gate Rev. 4 18 July 2014 Product data sheet 1. General description The HEF4077B is a quad 2-input EXCLUSIVE-NOR gate. The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance. The HEF4077B operates over a recommended V power supply range of 3 V to 15 V DD referenced to V (usually ground). Unused inputs must be connected to V , V , or SS DD SS another input. 2. Features and benefits Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from 40 C to +85 C Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version HEF4077BP 40 Cto +85 C DIP14 plastic dual in-line package 14 leads (300 mil) SOT27-1 HEF4077BT 40 Cto +85 C SO14 plastic small outline package 14 leads body width 3.9 mm SOT108-1 4. Functional diagram 1 1A 1Y 3 2 1B 5 2A 2Y 4 6 2B 8 3A 3Y 10 9 3B 12 4A 1A 4Y 11 13 4B 1Y 1B aaa-012675 aaa-012674 Fig 1. Functional diagram Fig 2. Logic diagram (one gate)HEF4077B NXP Semiconductors Quad 2-input EXCLUSIVE-NOR gate 5. Pinning information 5.1 Pinning HEF4077B 1 14 1A V DD 1B 2 13 4B 1Y 3 12 4A 2Y 4 11 4Y 2A 5 10 3Y 6 9 2B 3B V 7 8 3A SS aaa-012676 Fig 3. Pin configuration 5.2 Pin description Table 2. Pin description Symbol Pin Description 1A to 4A 1, 5, 8, 12 input 1B to 4B 2, 6, 9, 13 input 1Y to 4Y 3, 4, 10, 11 output V 7 ground (0 V) SS V 14 supply voltage DD 6. Functional description 1 Table 3. Functional table Input Output nA nB nY LL H LH L HL L HH H 1 H = HIGH voltage level L = LOW voltage level. HEF4077B All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 4 18 July 2014 2 of 12