PDTB114EUF Nexperia

PDTB1xxxU series 500 mA, 50 V PNP resistor-equipped transistors Rev. 1 6 May 2014 Product data sheet 1. Product profile 1.1 General description PNP Resistor-Equipped Transistor (RET) family in a very small SOT323 (SC-70) Surface-Mounted Device (SMD) plastic package. Table 1. Product overview Type number Package NPN Package complement configuration Nexperia JEITA JEDEC PDTB113EU SOT323 SC-70 - PDTD113EU very small PDTB113ZU PDTD113ZU PDTB123EU PDTD123EU PDTB123YU PDTD123YU PDTB143EU PDTD143EU PDTB143XU PDTD143XU PDTB114EU PDTD114EU 1.2 Features 500 mA output current capability 10 % resistor ratio tolerance Built-in bias resistors AEC-Q101 qualified Simplifies circuit design High temperature applications up to 175 C Reduces component count 1.3 Applications IC inputs control Switching loads Cost-saving alternative to BC807 or BC817 series transistors in digital applicationsPDTB1xxxU series Nexperia 500 mA, 50 V PNP resistor-equipped transistors 1.4 Quick reference data Table 2. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V collector-emitter voltage open base - - 50 V CEO I output current - - 500 mA O R1 bias resistor 1 (input) PDTB113EU 1 k PDTB113ZU 1 k PDTB123EU 2.2 k PDTB123YU 2.2 k PDTB143EU 4.7 k PDTB143XU 4.7 k PDTB114EU 10 k R2 bias resistor 2 (base-emitter) PDTB113EU 1 k PDTB113ZU 10 k PDTB123EU 2.2 k PDTB123YU 10 k PDTB143EU 4.7 k PDTB143XU 10 k PDTB114EU 10 k 2. Pinning information Table 3. Pinning Pin Description Simplified outline Graphic symbol 1 input (base) 3 3 2 GND (emitter) R1 1 3 output (collector) R2 12 2 sym003 3. Ordering information Table 4. Ordering information Type number Package Name Description Version PDTB1xxxU series SC-70 plastic surface-mounted package 3 leads SOT323 PDTB1XXXU SER All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 1 6 May 2014 2 of 27