XC7SET86GW,125

XC7SET86 2-input EXCLUSIVE-OR gate Rev. 2 13 January 2022 Product data sheet 1. General description XC7SET86 is a high-speed Si-gate CMOS device. It provides a 2-input EXCLUSIVE-OR function. 2. Features and benefits Symmetrical output impedance High noise immunity Low power dissipation TTL input levels Balanced propagation delays ESD protection: HBM JESD22-A114E: exceeds 2000 V MM JESD22-A115-A: exceeds 200 V CDM JESD22-C101C: exceeds 1000 V Specified from -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version XC7SET86GW -40 C to +125 C TSSOP5 plastic thin shrink small outline package 5 leads SOT353-1 body width 1.25 mm XC7SET86GV -40 C to +125 C SC-74A plastic surface-mounted package 5 leads SOT753 4. Marking Table 2. Marking codes Type number Marking code 1 XC7SET86GW gH XC7SET86GV g86 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code.Nexperia XC7SET86 2-input EXCLUSIVE-OR gate 5. Functional diagram B B Y 1 Y 1 4 = 1 A 2 4 2 A mna038 mna039 mna040 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram 6. Pinning information 6.1. Pinning XC7SET86 1 5 B V CC 2 A GND 3 4 Y 001aak134 Fig. 4. Pin configuration SOT353-1 (TSSOP5) and SOT753 (SC-74A) 6.2. Pin description Table 3. Pin description Symbol Pin Description B 1 data input A 2 data input GND 3 ground (0 V) Y 4 data output V 5 supply voltage CC 7. Functional description Table 4. Function table H = HIGH voltage level L = LOW voltage level. Inputs Output A B Y L L L L H H H L H H H L XC7SET86 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2022. All rights reserved Product data sheet Rev. 2 13 January 2022 2 / 10