Product Information

NJU9103V-TE1

NJU9103V-TE1 electronic component of Nisshinbo

Datasheet
Analog Front End - AFE High Gain AFE 16-bit PGA from 1V/V to 512

Manufacturer: Nisshinbo
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

2000: USD 7.05 ea
Line Total: USD 14100

0 - Global Stock
MOQ: 2000  Multiples: 2000
Pack Size: 2000
Availability Price Quantity
0 - WHS 1


Ships to you between Thu. 30 May to Mon. 03 Jun

MOQ : 2000
Multiples : 2000

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NJU9103V-TE1
Nisshinbo

2000 : USD 6.0512

     
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NJU9103 Analog Front End with High Gain PGA FEATURES GENERAL DESCRIPTION Supply Voltage +2.7V to +3.6V NJU9103 is a small size AFE with up to 512 times Ambient Operating Temperature internal PGA (Programmable Gain Amplifier). -40C to +125C Internal 16-bit type A / D converter can perform ADC Resolution 16-Bit (No missing codes) conversion rates from 0.814ksps to 6.51ksps. (1) Data Rate 0.814k to 6.51ksps The customer can choose internal A/D converters Input mode Differential input, among single-ended input, differential input and (2) Single-ended pseudo-differential input. (3) Pseudo-differential Single PGA 1V/V to 512V/V NJU9103 can set the optimum gain to the pressure System Calibration for offset & gain drift sensor, flow sensor by a wide range of gain setting. Conversion mode Single / Continuous Sensor of the offset is corrected by internal D / A Interface SPI converter. Various parameters (such as gain, Package DFN8 (ESON8-V1) / 2.3mm x 2.3mm conversion rate, correction) settings can be easily set in SSOP8 / 3.5mm x 6.4mm the SPI communication from an external MCU. (1) Case of single conversion. NJU9103 will contribute to the customer s (Continuous conversion is three times the data rate.) development time reduction and the series product (2) PGA2 can be used only. (PGA1 cannot be used.) release. NJU9103 is also can be mounted in a narrow Two channels of VINP & VINN can be used. application footprint by a small 8-pin package. Package (3) Bias voltage of VINP & VINN is common to VDD / 2. is preparing the DFN and SSOP Input Signal can be used VINP only. APPLICATION Pressure sensors Flowmeters Thermostat PLC Digital Panel Meters EQUIVALENT CIRCUIT BLOCK DAIGRAM VREF VINP SCK 1 + 8 SW ADC - VINN SDI Interface EMI MUX 7 2 and PGA2 Filter Control Digital Filter VREF SW - SDO / RDYB and 3 + 6 Calibration PGA1 VDD GND VDD PGIN2=x1, x2, x4 5 4 GND PGIN1=x1, x2, x4, x8, x16, Internal POR x32, x64, x128 0.814ksps to 6.51ksps Oscillator NFB=15-Bit 0.814ksps Ver.1.0 - 1 - NJU9103 PIN CONFIGURATION DFN8 (ESON8-V1) SSOP8 8 7 6 5 1 2 3 4 PIN NO. SYMBOL PIN TYPE 1 VINP +INPUT for differential mode / INPUT1 for Single-ended mode 2 VINN -INPUT for differential mode / INPUT2 for single-ended mode 3 VREF Reference Voltage Input 4 VDD Supply Voltage 5 GND GND 6 SDO / RDYB SPI serial data output / RDYB output 7 SDI SPI serial data input 8 SCK SPI serial clock input Exposed PAD *(1) Exposed PAD on backside connects to GND. DFN8(ESON8-V1) only Ver.1.0 - 2 -

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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