74ALVC32D,118

74ALVC32 Quad 2-input OR gate Rev. 3 20 January 2014 Product data sheet 1. General description The 74ALVC32 is a quad 2-input OR gate. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. 2. Features and benefits Wide supply voltage range from 1.65 V to 3.6 V 3.6 V tolerant inputs/outputs CMOS low power consumption Direct interface with TTL levels (2.7 V to 3.6 V) Power-down mode Latch-up performance exceeds 250 mA Complies with JEDEC standards: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74ALVC32D 40 Cto +85 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74ALVC32PW 40 Cto +85 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74ALVC32BQ 40 Cto +85 C DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1 thin quad flat package no leads 14 terminals body 2.5 3 0.85 mm74ALVC32 NXP Semiconductors Quad 2-input OR gate 4. Functional diagram < % < % < % < % PQ D PQ Fig 1. Logic symbol Fig 2. IEC logic symbol < % D PQ Fig 3. Logic diagram (one gate) 5. Pinning information 5.1 Pinning terminal 1 1A 1 14 V CC index area 1B 2 13 4B 1B 2 13 4B 1Y 3 12 4A 3 12 1Y 4A 2A 4 32 11 4Y 2A 4 32 11 4Y 5 10 2B (1) 3B GND 2B 5 10 3B 2Y 6 9 3A 2Y 6 9 3A 001aad102 GND 7 8 3Y 001aad101 Transparent top view (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 4. Pin configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14 74ALVC32 All information provided in this document is subject to legal disclaimers. NXP B.V. 2014. All rights reserved. Product data sheet Rev. 3 20 January 2014 2 of 14 GND 7 1 1A 3Y 8 14 V CC D