Product Information

74HC137N

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Datasheet
74HC137N 3-8 LINE DECODER/DEMULTI PLX D
Manufacturer: NXP



Price (USD)

1: USD 0.7252 ea
Line Total: USD 0.7252

5 - Global Stock
Ships to you by
Mon. 27 Mar
MOQ: 1 Multiples:1
Pack Size :   1
Availability Price Quantity
5 - Global Stock


Ships to you by Mon. 27 Mar

MOQ : 1
Multiples : 1
1 : USD 0.7252
25 : USD 0.6562
50 : USD 0.518
75 : USD 0.449
100 : USD 0.4317

     
Manufacturer
NXP
Product Category
Encoders, Decoders, Multiplexers & Demultiplexers
Logic Family
Hc
Number of Input Lines
3 Input
Number of Output Lines
8 Output
Propagation Delay Time
50 ns
Supply Voltage - Max
6 V
Supply Voltage - Min
2 V
Minimum Operating Temperature
- 40 C
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Package / Case
PDIP - 16
Packaging
Tube
Number Of Circuits
1 Circuit
Brand
Nxp Semiconductors
Factory Pack Quantity :
25
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74HC137 3-to-8 line decoder, demultiplexer with address latches; inverting Rev. 4 23 December 2015 Product data sheet 1. General description The 74HC137 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC137 is specified in compliance with JEDEC standard no. 7A. The 74HC137 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC137 essentially combines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE = LOW), the 74HC137 acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long as LE remains HIGH. The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH. The 74HC137 is ideally suited for implementing non-overlapping decoders in 3-state systems and strobed (stored address) applications in bus oriented systems. 2. Features and benefits Combines 3-to-8 decoder with 3-bit latch Multiple input enable for easy expansion or independent controls Active LOW mutually exclusive outputs Low-power dissipation Complies with JEDEC standard no. 7A ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Specified from 40 Cto+80 C and from 40 Cto+125 C. 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC137D 40 C to +125 C SO16 plastic small outline package; 16 leads; SOT109-1 body width 3.9 mm 74HC137DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; SOT338-1 body width 5.3 mm74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting 4. Functional diagram  < < <  $ <  $ ,1387 2 7 < 7 / $  $ < <  <   (  (  Fig 1. Functional diagram                      < < <  <   $  <   ,1387 2  7 $  7 / $ <   $  <   <   <          (1  DED Fig 2. Logic symbol Fig 3. IEC logic symbol 74HC137 All information provided in this document is subject to legal disclaimers. . Product data sheet Rev. 4 23 December 2015 2 of 19 Nexperia B.V. 2017. All rights reserved ( DDE (   '    '  '(5 '(&2 &+(6     '    &   ;   /(    ' *   &  '; DDE  '(&2'(5 &+(6       /(

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
FR9
Freescale
FREESCALE SEMI
Freescale Semicon
FREESCALE SEMICONDUC
Freescale Semiconductor
Freescale Semiconductor - NXP
NXP
NXP Freescale
NXP (FREESCALE)
NXP / Freescale
NXP SEMI
NXP Semicon
NXP SEMICONDUCTOR
NXP Semiconductors
NXP USA Inc.
PH3
PHI