74HC238DB/T3 NXP

74HC238 74HCT238 3-to-8 line decoder/demultiplexer Rev. 4 27 January 2016 Product data sheet 1. General description The 74HC238 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four 238 ICs and one inverter. The 238 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC 2. Features and benefits Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Active HIGH mutually exclusive outputs Multiple package options Complies with JEDEC standard no. 7A Input levels: For 74HC238: CMOS level For 74HCT238: TTL level ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Specified from 40 Cto+85 C and from 40 Cto+125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC238D 40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74HCT238D 74HC238DB 40 C to +125 C SSOP16 plastic shrink small outline package 16 leads SOT338-1 body width 5.3 mm 74HCT238DB74HC238 74HCT238 Nexperia 3-to-8 line decoder/demultiplexer Table 1. Ordering information continued Type number Package Temperature range Name Description Version 74HC238PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74HCT238PW 74HC238BQ 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin SOT763-1 quad flat package no leads 16 terminals 74HCT238BQ body 2.5 3.5 0.85 mm 4. Functional diagram < < < < < < < 2 7 ( (1 %/ , 1* ( ,7 < < 2 7 ( (1 %/ ,7,1* ( < < < < < < < ( ( ( ( ( ( DD J Fig 1. Logic symbol Fig 2. Functional diagram 74HC HCT238 All information provided in this document is subject to legal disclaimers Product data sheet Rev. 4 27 January 2016 2 of 19 Nexperia B.V. 2017. All rights reserved DDJ (&2 (5 (&2 (5