74HC258DB,118

74HC258 Quad 2-input multiplexer; 3-state; inverting Rev. 04 14 April 2008 Product data sheet 1. General description The 74HC258 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC258 is specied in compliance with JEDEC standard no. 7A. The 74HC258 has four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data from two sources and is controlled by a common data select input (S). The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data inputs from source 1 (1I1 to 4I1) are selected when S is HIGH. Data appears at the outputs (1Yto4Y) in inverted form from the select inputs. The 74HC258 is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The outputs are forced to a high-impedance OFF-state when OE is HIGH. The logic equations for the outputs are: 1Y = OE ()1I1 S + 1I0 S 2Y = OE ()2I1 S + 2I0 S 3Y = OE ()3I1 S + 3I0 S 4Y = OE ()4I1 S + 4I0 S The 74HC258 is identical to the 74HC257 but has inverting outputs. 2. Features n 3-state outputs interface directly with system bus n Low-power dissipation n Inverting data path n Complies with JEDEC standard no. 7A n ESD protection: u HBM JESD22-A114E exceeds 2000 V u MM JESD22-A115-A exceeds 200 V n Multiple package options n Specied from - 40 Cto+85 C and from - 40 C to +125 C.74HC258 NXP Semiconductors Quad 2-input multiplexer; 3-state; inverting 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC258N - 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 74HC258D - 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HC258DB - 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body SOT338-1 width 5.3 mm 4. Functional diagram 1 S 2 3 5 6 11 10 14 13 2 1I0 4 1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1 1Y 3 1I1 5 1 S 2I0 7 SELECTOR 2Y 6 2I1 11 3I0 9 3Y 10 3I1 15 OE 3-STATE MULTIPLEXER OUTPUTS 14 4I0 12 4Y 13 4I1 1Y 2Y 3Y 4Y 15 OE 4 7 9 12 001aab968 001aab966 Fig 1. Functional diagram Fig 2. Logic symbol 1I0 1Y 1I1 1 G1 15 2I0 EN 2Y 2 2I1 MUX 1 4 3 1 3I0 5 7 3Y 6 3I1 11 9 4I0 10 14 4Y 12 4I1 13 OE 001aab967 S 001aab969 Fig 3. IEC logic symbol Fig 4. Logic diagram 74HC258_4 NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 14 April 2008 2 of 14