NXP Semiconductors Document Number: CD1020 Rev. 4, 7/2019 Technical Data 22 channel multiple switch detection CD1020 interface The CD1020 is a cost optimized switch detection interface device (MSDI) designed to detect the closing and opening of up to 22 switch contacts. The MULTIPLE SWITCH DETECTION INTERFACE switch status, either open or closed, is transferred to the microprocessor unit (MCU) through a Serial Peripheral Interface (SPI). This SMARTMOS device also features a 22-to-1 analog multiplexer for reading the input channels as analog inputs. The analog selected input signal is buffered and provided on the AMUX output pin for the MCU to read. The CD1020 device has two modes of operation, normal and low-power mode (LPM). Normal mode allows programming of the device and supplies switch contacts with pull-up or pull-down current as it monitors the change of state on ES SUFFIX (PB-FREE) the switches. The LPM provides low quiescent current, which makes the 98ASA00656D CD1020 ideal for automotive and industrial products requiring low sleep-state 32-PIN QFN (WF-TYPE) currents. Applications The low cost MSDI is available in high power, space saving wettable flank Automotive 5x5 mm QFN package. Heating ventilation and air conditioning (HVAC) Features Lighting Fully functional operation 6.0 V V 36 V BATP Central gateway/in-vehicle networking Full parametric operation 6.0 V V 28 V BATP Gasoline engine management Operating switch input voltage range from 1.0 V to 36 V Eight programmable inputs (switches to battery or ground) 14 switch-to-ground inputs Selectable wetting current (2, 8, 12, 16 mA) Interfaces directly to an MCU using 3.3 V / 5.0 V SPI protocol Selectable wake-up on change of state Typical standby current I = 30 A and I = 10 A BATP DDQ Active interrupt (INT B) on change-of-switch state V DDQ Battery Power Supply CD1020 SG1 Battery VBATP SP0 Power WAKE B Supply MCU SP1 VDDQ INT B INTB SP7 CS B CSB MISO MISO MOSI MOSI SCLK SCLK SG0 AN0 AMUX SG12 EP SG13 GND Figure 1. CD1020 simplified application diagram NXP B.V. 2019.Table of Contents 1 Orderable parts 3 2 Internal block diagram . 4 3 Pin connections 5 3.1 Pinout . 5 3.2 Pin definitions . 5 4 General product characteristics 7 4.1 Maximum ratings . 7 4.2 Thermal characteristics 8 4.3 Operating conditions 9 4.4 Electrical characteristics . 9 5 General description 15 5.1 Features 15 5.2 Functional block diagram . 16 6 General IC functional description 17 6.1 Battery voltage ranges . 17 6.2 Power sequencing conditions 18 7 Functional block description . 19 7.1 State diagram 19 7.2 Low-power mode operation 20 7.3 Input functional block 22 7.4 Oscillator and timer control functional block . 24 7.5 Temperature monitor and control functional block 25 7.6 WAKE B control functional block . 25 7.7 INT B functional block . 25 7.8 AMUX functional block . 25 7.9 Serial peripheral interface (SPI) 26 7.10 SPI control register definition 29 8 Typical applications 49 8.1 Application diagram 49 8.2 Bill of materials . 49 8.3 Abnormal operation 50 9 Packaging . 51 9.1 Package mechanical dimensions . 51 10 Reference section . 55 11 Revision history . 55 CD1020 NXP Semiconductors 2