Product Information

MC33FS6500NAE

MC33FS6500NAE electronic component of NXP

Datasheet
Power Management Specialized - PMIC System Basis Chip, DCDC 0.8A Vcore, LQFP48EP

Manufacturer: NXP
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 7.8366 ea
Line Total: USD 7.84

155 - Global Stock
Ships to you between
Tue. 21 May to Thu. 23 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
6 - WHS 1


Ships to you between
Wed. 22 May to Mon. 27 May

MOQ : 1
Multiples : 1
1 : USD 9.0798
10 : USD 8.4413
30 : USD 7.3375
100 : USD 6.3748

155 - WHS 2


Ships to you between Tue. 21 May to Thu. 23 May

MOQ : 1
Multiples : 1
1 : USD 7.8366
10 : USD 7.2088
25 : USD 6.1582
100 : USD 6.1341
250 : USD 5.8564
500 : USD 5.3975
1000 : USD 4.9146
2500 : USD 4.9146
5000 : USD 4.9146

     
Manufacturer
Product Category
RoHS - XON
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Cnhts
Hts Code
Mxhts
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FS6500, FS4500 Safety power system basis chip with CAN FD and LIN transceivers Rev. 7.0 11 November 2020 Product short data sheet 1 General description The FS6500/FS4500 SMARTMOS devices are a multi-output, power supply, integrated circuit, including CAN Flexible Data (FD) and/or LIN transceivers, dedicated to the automotive market. Multiple switching and linear voltage regulators, including low-power mode (32 A) are available with various wake-up capabilities. An advanced power management scheme is implemented to maintain high efficiency over a wide range of input voltages (down to 2.7 V) and output current ranges (up to 2.2 A). The FS6500/FS4500 includes configurable fail-safe/fail silent safety behavior and features, with two fail-safe outputs, becoming a full part of a safety oriented system partitioning, to reach a high integrity safety level (up to ASIL D). (13) (14) The built-in CAN FD interface fulfills the ISO 11898-2 and -5 standards. The LIN (23) (24) (25) interface fulfills LIN protocol specifications 2.0, 2.1 , 2.2 , and SAE J2602-2 . High temperature capability up to T = 125 C and T = 150 C, compliant with AEC- A J Q100 Grade 1 automotive qualification. 2 Features and benefits Battery voltage sensing and MUX output pin Highly flexible SMPS pre-regulator, allowing two topologies: non-inverting buck-boost and standard buck Family of devices to supply MCU core from 1.0 V to 5.0 V, with SMPS (0.8 A, 1.5 A or 2.2 A) or LDO (0.5 A) Linear voltage regulator dedicated to auxiliary functions, or to sensor supply (V CCA tracker or independent), 5.0 V, or 3.3 V Linear voltage regulator dedicated to MCU Analog/Digital (A/D) reference voltage or I/Os supply (V ), 5.0 V, or 3.3 V CCA 3.3 V keep alive memory supply available in low-power mode Long duration timer, counting up to 6 months with 1.0 s resolution Multiple wake-up sources in low-power mode: CAN, LIN, IOs, LDT Five configurable I/Os 3 Applications Drive Train Electrification (BMS, Hybrid EV and HEV, Inverter, DC-DC, Alterno Starter) Drive Train - Chassis and Safety (Active Suspension, Steering, Safety Domain Gateway) Power Train (EMS, TCU, Gear Box) ADAS (LDW, Radar, Sensor Fusion Safety area)NXP Semiconductors FS6500, FS4500 Safety power system basis chip with CAN FD and LIN transceivers 4 Simplified application diagrams V V +battery PRE CORE VDD (KL30) VSUP3 FB CORE VSENSE VAUX E VAUX B COMP CORE MCU VAUX V AUX FCRBM SELECT V PRE VCCA E VCCA B CAN-5V VCCA VCCA AD ref. DEBUG voltage mode V CORE DEBUG VDDIO or V CCA ignition key IO 0 (KL15) MUX OUT ADC Input FS6500C IO 5/VKAM IO 4 Vstandby to switch MOSI CANH MISO CAN BUS CANL SPI SCLK NCS VPU-FS INTB NMI V DDIO RSTB Reset FS1B fail-safe delay TXD CAN RXD V DDIO V DDIO fail-safe FS0B IO 3 drive IO 2 FCCU GNDA GND COM DGND aaa-037730 Figure 1.FS6500C simplified application diagram - buck boost configuration - FS1B V +battery PRE VCORE VDD (KL30) FB CORE VSUP3 VSENSE VAUX E VAUX B COMP CORE MCU VAUX V V AUX PRE FCRBM SELECT V PRE VCCA E VCCA B CAN-5V V DEBUG VCCA CCA AD ref. mode voltage V CORE DEBUG VDDIO or VCCA ignition key IO 0 (KL15) MUX OUT ADC Input IO 5/VKAM FS6500L IO 4 Vstandby to switch MOSI CANH MISO CAN BUS CANL SPI SCLK NCS INTB VSUP3 NMI V DDIO LIN RSTB LIN BUS Reset TXD V DDIO CAN RXD fail-safe FS0B TXDL drive RXDL LIN V DDIO IO 3 IO 2 FCCU GNDA GND COM DGND aaa-037731 Figure 2.FS6500L simplified application diagram - buck configuration - LIN - V = 100 CCA mA FS6500-FS4500SDS All information provided in this document is subject to legal disclaimers. NXP B.V. 2020. All rights reserved. Product short data sheet Rev. 7.0 11 November 2020 2 / 25 VSUP1 VSUP1 VSUP2 VSUP2 SW PRE1 SW PRE1 SW PRE2 SW PRE2 BOOT PRE BOOT PRE GATE LS GATE LS VPRE VPRE SW CORE SW CORE BOOT CORE BOOT CORE VCORE SNS VCORE SNS

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Monolithic integrated circuits:
FR9
Freescale
FREESCALE SEMI
Freescale Semicon
FREESCALE SEMICONDUC
Freescale Semiconductor
Freescale Semiconductor - NXP
NXP
NXP Freescale
NXP (FREESCALE)
NXP / Freescale
NXP SEMI
NXP Semicon
NXP SEMICONDUCTOR
NXP Semiconductors
NXP USA Inc.
PH3
PHI

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