Document Number: IMX8MDQLQCEC NXP Semiconductors Rev. 3, 04/2021 Data Sheet: Technical Data MIMX8MQ6DVAJZAA MIMX8MQ6DVAJZAB MIMX8MQ5DVAJZAA MIMX8MQ5DVAJZAB MIMX8MQ6DVAJZIB MIMX8MD6DVAJZAA MIMX8MD6DVAJZAB i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Package Information Bare Die Package Data Sheet for Consumer FBGA 17 x 17 mm, 0.65 mm pitch Products Ordering Information See Table 2 on page 6 1 i.MX 8M Dual / 8M QuadLite / 8M Quad introduction The i.MX 8M Dual / 8M QuadLite / 8M Quad processors 1. i.MX 8M Dual / 8M QuadLite / 8M Quad introduction . 1 1.1. Block diagram 5 represent NXPs latest market of connected streaming 1.2. Ordering information . 6 audio/video devices, scanning/imaging devices, and 2. Modules list . 8 2.1. Recommended connections for unused interfaces 12 various devices requiring high-performance, low-power 3. Electrical characteristics 13 processors. 3.1. Chip-level conditions 13 3.2. Power supplies requirements and restrictions . 27 The i.MX 8M Dual / 8M QuadLite / 8M Quad processors 3.3. PLL electrical characteristics 29 3.4. On-chip oscillators 30 feature advanced implementation of a quad Arm 3.5. I/O DC parameters . 32 Cortex -A53 core, which operates at speeds of up to 3.6. I/O AC parameters . 34 1.5 GHz. A general purpose Cortex -M4 core processor 3.7. Output buffer impedance parameters . 37 3.8. System modules timing 39 is for low-power processing. The DRAM controller 3.9. External peripheral interface parameters 40 supports 32-bit/16-bit LPDDR4, DDR4, and DDR3L 4. Boot mode configuration 76 4.1. Boot mode configuration pins . 76 memory. There are a number of other interfaces for 4.2. Boot device interface allocation 77 connecting peripherals, such as WLAN, Bluetooth, GPS, 5. Package information and contact assignments . 78 displays, and camera sensors. The i.MX 8M Quad and 5.1. 17 x 17 mm package information 78 5.2. DDR pin function list for 17 x 17 mm package 98 i.MX 8M Dual processors have hardware acceleration 6. Revision history 101 for video playback up to 4K, and can drive the video outputs up to 60 fps. Although the i.MX 8M QuadLite processor does not have hardware acceleration for video decode, it allows for video playback with software decoders if needed. NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products.i.MX 8M Dual / 8M QuadLite / 8M Quad introduction Table 1. Features Subsystem Feature Arm Cortex-A53 MPCore platform Quad symmetric Cortex-A53 processors: 32 KB L1 Instruction Cache 32 KB L1 Data Cache Support L1 cache RAMs protection with parity/ECC Support of 64-bit Armv8-A architecture: 1 MB unified L2 cache Support L2 cache RAMs protection with ECC Frequency of 1.5 GHz Arm Cortex-M4 core platform 16 KB L1 Instruction Cache 16 KB L1 Data Cache 256 KB tightly coupled memory (TCM) Connectivity Two PCI Express Gen2 interfaces Two USB 3.0/2.0 controllers with integrated PHY interfaces Two Ultra Secure Digital Host Controller (uSDHC) interfaces One Gigabit Ethernet controller with support for EEE, Ethernet AVB, and IEEE 1588 Four Universal Asynchronous Receiver/Transmitter (UART) modules 2 Four I C modules Three SPI modules External memory interface 32/16-bit DRAM interface: LPDDR4-3200, DDR4-2400, DDR3L-1600 8-bit NAND-Flash eMMC 5.0 Flash SPI NOR Flash QuadSPI Flash with support for XIP GPIO and pin multiplexing GPIO modules with interrupt capability Input/output multiplexing controller (IOMUXC) to provide centralized pad control On-chip memory Boot ROM (128 KB) On-chip RAM (128 KB + 32 KB) Power management Temperature sensor with programmable trip points Flexible power domain partitioning with internal power switches to support efficient power management i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Consumer Products, Rev. 3, 04/2021 2 NXP Semiconductors