Document Number: MPC755ECS02AD
Freescale Semiconductor
Rev. 2.1, 02/2006
Advance Information
MPC755 RISC Microprocessor
Hardware Specifications Addendum
for the XPC7n5BxxnnnLD Series
This document describes part-number-specific changes to Freescale Part Numbers Affected:
recommended operating conditions and revised electrical
XPC755BRX300LD
specifications, as applicable, from those described in the
XPC755BRX350LD
general MPC755 RISC Microprocessor Hardware
XPC755BRX400LD
Specifications (MPC755EC). The MPC755 and MPC745 are
XPC755BPX300LD
reduced instruction set computing (RISC) microprocessors
XPC755BPX350LD
that implement the PowerPC instruction set architecture.
XPC755BPX400LD
XPC745BPX300LD
Specifications provided in this document supersede those in
XPC745BPX350LD
the MPC755 RISC Microprocessor Hardware
Specifications, Rev. 4 or later, for the part numbers listed in
Table A only. Specifications not addressed herein are
unchanged. Because this document is frequently updated,
refer to the website listed on the back cover of this addendum
or contact your Freescale sales office for the latest version.
Note that headings and table numbers in this document are
not consecutively numbered. They are intended to
correspond to the heading or table affected in the general
hardware specification.
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
Freescale Semiconductor, Inc., 2002, 2006. All rights reserved.General Parameters
Part numbers addressed in this document are listed in Table A. For more detailed ordering information see
Section 10, Ordering Information.
Table A. Significant Differences from Hardware Specifications by Part Number
Operating Conditions
Freescale Significant Differences from
CPU
Part Number T Hardware Specification
j
Frequency V
DD
(C)
(MHz)
XPC755BRX300LD 300 2.0 V 100 mV 0 to 105 2.0 V/1.8 V I/O voltage supported, 2.5 V I/O not
supported; all nominal core voltages are 2.0 V
XPC755BRX350LD 350
100 mV; AC timing different for processor bus and
L2 bus interfaces; L2 bus interface AC timing not
XPC755BRX400LD 400
guaranteed in 1.8 V/2.0 V mode.
XPC755BPX300LD 300
XPC755BPX350LD 350
XPC755BPX400LD 400
XPC745BPX300LD 300 2.0 V/1.8 V I/O voltage supported, 2.5 V I/O not
supported; all nominal core voltages are 2.0 V
XPC745BPX350LD 350
100 mV; AC timing different for processor bus
interface.
Note: The X prefix in a Freescale part number designates a Pilot Production Prototype as defined by Freescale SOP 3-13.
These are from a limited production volume of prototypes manufactured, tested, and Q.A. inspected on a qualified technology
to simulate normal production. These parts have only preliminary reliability and characterization data. Before pilot production
prototypes may be shipped, written authorization from the customer must be on file in the applicable sales office acknowledging
the qualification status and the fact that product changes may still occur while shipping pilot production prototypes.
There are currently no known errata for the part numbers addressed by this data sheet.
3 General Parameters
The following general parameters apply to all part numbers described herein:
Core power supply 2.0 V 100 mV DC (nominal; see Table 3 for recommended operating
conditions)
I/O power supply 1.8 V 100 mV dc (processor bus interface only; not supported on
L2 interface), or
2.0 V 100 mV dc (processor bus interface only; not supported on
L2 interface), or
3.3 V 165 mV dc (input thresholds are configuration pin selectable)
Note that part revisions prior to Rev. 2.8 (Rev. E) do not support core voltages down to 1.8 V.
4.1 DC Electrical Characteristics
All part numbers affected by this specification support 3.3 V and 1.8 V/2.0 V I/O voltages, but do not
support 2.5 V I/O voltages. Table 2 describes the input threshold voltage settings. These settings apply to
MPC755 RISC Microprocessor Hardware Specifications Addendum for the XPC7n5BxxnnnLD Series, Rev. 2.1
2 Freescale Semiconductor