MPC866EC Freescale Semiconductor Rev. 2, 2/2006 Technical Data MPC866/MPC859 Hardware Specifications Contents This document contains detailed information on power 1. Overview . 1 considerations, DC/AC electrical characteristics, and AC timing 2. Features 2 specifications for the MPC866/859 family (refer to Table 1 for a 3. Maximum Tolerated Ratings . 8 list of devices). The MPC866P is the superset device of the 4. Thermal Characteristics . 9 MPC866/859 family.This document describes pertinent electrical 5. Power Dissipation . 10 6. DC Characteristics 10 and physical characteristics of the MPC8245. For functional 7. Thermal Calculation and Measurement 12 characteristics of the processor, refer to the MPC866 8. Power Supply and Power Sequencing . 15 PowerQUICC Family Users Manual (MPC866UM/D). 9. Layout Practices 15 10. Bus Signal Timing 16 11. IEEE 1149.1 Electrical Specifications . 46 1Overview 12. CPM Electrical Characteristics . 48 13. UTOPIA AC Electrical Specifications . 72 The MPC866/859 is a derivative of Freescales MPC860 14. FEC Electrical Characteristics . 74 PowerQUICC family of devices. It is a versatile single-chip 15. Mechanical Data and Ordering Information . 78 integrated microprocessor and peripheral combination that can be 16. Document Revision History . 93 used in a variety of controller applications and communications and networking systems. The MPC866/859/859DSL provides enhanced ATM functionality over that of other ATM-enabled members of the MPC860 family. Freescale Semiconductor, Inc., 2006. All rights reserved.Features Table 1 shows the functionality supported by the members of the MPC866/859 family. 2Features Table 1. MPC866 Family Functionality Cache Ethernet Part SCC SMC Instruction Data 10T 10/100 MPC866P 16 Kbytes 8 Kbytes Up to 4 1 4 2 MPC866T 4 Kbytes 4 Kbytes Up to 4 1 4 2 MPC859P 16 Kbytes 8 Kbytes 1112 MPC859T 4 Kbytes 4 Kbytes 1112 1 2 MPC859DSL 4 Kbytes 4 Kbytes 1 1 1 1 3 MPC852T 4 KBytes 4 Kbytes 2121 1 On the MPC859DSL, the SCC (SCC1) is for ethernet only. Also, the MPC859DSL does not support the Time Slot Assigner (TSA). 2 On the MPC859DSL, the SMC (SMC1) is for UART only. 3 For more details on the MPC852T, please refer to the MPC852T Hardware Specifications. The following list summarizes the key MPC866/859 features: Embedded single-issue, 32-bit PowerPC core (implementing the PowerPC architecture) with thirty-two 32-bit general-purpose registers (GPRs) The core performs branch prediction with conditional prefetch, without conditional execution 4- or 8-Kbyte data cache and 4- or 16-Kbyte instruction cache (see Table 1) 16-Kbyte instruction cache (MPC866P and MPC859P) is four-way, set-associative with 256 sets 4-Kbyte instruction cache (MPC866T, MPC859T, and MPC859DSL) is two-way, set-associative with 128 sets. 8-Kbyte data cache (MPC866P and MPC859P) is two-way, set-associative with 256 sets 4-Kbyte data cache(MPC866T, MPC859T, and MPC859DSL) is two-way, set-associative with 128 sets. Cache coherency for both instruction and data caches is maintained on 128-bit (4-word) cache blocks Caches are physically addressed, implement a least recently used (LRU) replacement algorithm, and are lockable on a cache block basis. MMUs with 32-entry TLB, fully associative instruction and data TLBs MMUs support multiple page sizes of 4, 16, and 512 Kbytes, and 8 Mbytes 16 virtual address spaces and 16 protection groups. Advanced on-chip-emulation debug mode The MPC866/859 provides enhanced ATM functionality over that of the MPC860SAR. The MPC866/859 adds major new features available in enhanced SAR (ESAR) mode, including the following: Improved operation, administration, and maintenance (OAM) support OAM performance monitoring (PM) support Multiple APC priority levels available to support a range of traffic pace requirements MPC866/MPC859 Hardware Specifications, Rev. 2 2 Freescale Semiconductor