NTS0302 2-bit dual supply translating transceiver open drain auto direction sensing Rev. 1 17 June 2019 Product data sheet 1. General description The NTS0302 is a 2-bit, dual supply translating transceiver family with auto direction sensing, that enables bidirectional voltage level translation. It features two 1-bit input-output ports (A and B), one output enable input (OE) and two supply pins (V CC(A) and V ). V can be supplied at any voltage between 0.95 V and 3.6 V. V can CC(B) CC(A) CC(B) be supplied at any voltage between 1.65 V and 5.5 V. This flexibility makes the device suitable for translating between any of the voltage nodes (0.95 V, 1.2 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins A and OE are referenced to V and pin B is referenced to V . A CC(A) CC(B) LOW level at pin OE causes the outputs to assume a high-impedance OFF-state. 2. Features and benefits Wide supply voltage range: V : 0.95 V to 3.6 V and V : 1.65 V to 5.5 V CC(A) CC(B) No power-sequencing required Maximum data rate Open-drain: 2 Mbps Push-pull: 20 Mbps Longer one-shot pulse for driving larger capacitive loads with much reduced ringing and overshoot A-side inputs accept voltages up to 3.6 V B-side inputs accept voltages up to 5.5 V ESD protection: HBM JESD22-A114E Class 2 exceeds 2000 V for both ports CDM JESD22-C101E exceeds 1000 V for both ports Latch-up performance exceeds 100 mA per JESD 78B Class II Available in X2SON8 package Specified from 40 Cto+125 C 3. Applications 2 I C/SMBus, UART GPIONTS0302 NXP Semiconductors 2-bit dual supply translating transceiver open drain auto direction sensing 4. Ordering information Table 1. Ordering information Type number Topside Package marking Name Description Version 1 NTS0302JK 2x X2SON8 plastic super thin small outline package no leads 8 SOT1986-1 terminals 1.4 x 1.0 x 0.32 mm body 1 x changes based on date code. 4.1 Ordering options Table 2. Ordering options Type number Orderable Package Packing method Minimum Temperature part number order quantity NTS0302JK NTS0302JKZ X2SON8 reel 7 q1/t1 10000 T = 40 C to +125 C amb *standard mark 5. Functional diagram GATE BIAS OE A1 B1 An Bn V V CC(A) CC(B) aaa-031817 Fig 1. Logic symbol NTS0302 All information provided in this document is subject to legal disclaimers. NXP B.V. 2019. All rights reserved. Product data sheet Rev. 1 17 June 2019 2 of 25