NX3L1G66GW NXP

NX3L1G66 Low-ohmic single-pole single-throw analog switch Rev. 8 9 November 2011 Product data sheet 1. General description The NX3L1G66 is a low-ohmic single-pole single-throw analog switch. It has two input/output terminals (Y and Z) and an active HIGH enable input pin (E). When E is LOW, the analog switch is turned off. Schmitt trigger action at the enable input (E) makes the circuit tolerant to slower input rise and fall times. The NX3L1G66 allows signals with amplitude up to V to be transmitted CC from Y to Z or from Z to Y. Its low ON resistance (0.5 ) and flatness (0.13 ) ensures minimal attenuation and distortion of transmitted signals. 2. Features and benefits Wide supply voltage range from 1.4 V to 4.3 V Very low ON resistance (peak): 1.6 (typical) at V =1.4 V CC 1.0 (typical) at V =1.65V CC 0.55 (typical) at V =2.3 V CC 0.50 (typical) at V =2.7 V CC 0.50 (typical) at V =4.3 V CC High noise immunity ESD protection: HBM JESD22-A114F Class 3A exceeds 7500 V MM JESD22-A115-A exceeds 200 V CDM AEC-Q100-011 revision B exceeds 1000 V IEC61000-4-2 contact discharge exceeds 4000 V for switch ports CMOS low-power consumption Latch-up performance exceeds 100 mA per JESD 78 Class II Level A Direct interface with TTL levels at 3.0 V Control input accepts voltages above supply voltage High current handling capability (350 mA continuous current under 3.3 V supply) Specified from 40 C to +85 C and from 40 C to +125 C 3. Applications Cell phone PDA Portable media playerNX3L1G66 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version NX3L1G66GW 40 Cto +125 C TSSOP5 plastic thin shrink small outline package 5 leads SOT353-1 body width 1.25 mm NX3L1G66GM 40 C to +125 C XSON6 plastic extremely thin small outline package no leads SOT886 6 terminals body 1 1.45 0.5 mm 5. Marking 1 Table 2. Marking codes Type number Marking code NX3L1G66GW DL NX3L1G66GM DL 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. Functional diagram YZ E ZY E 001aag487 001aah372 Fig 1. Logic symbol Fig 2. Logic diagram 7. Pinning information 7.1 Pinning NX3L1G66 NX3L1G66 Y 1 6 V CC YV1 5 CC Z 2 5 n.c. Z 2 GND 3 4 E GND 3 4 E 001aah444 Transparent top view 001aai590 Fig 3. Pin configuration SOT353-1 (TSSOP5) Fig 4. Pin configuration SOT886 (XSON6) NX3L1G66 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 8 9 November 2011 2 of 19