Freescale Semiconductor Document Number: P1020PB Rev. 0, 11/2008 Product Brief This document contains preview information on a new product that may be in a design phase or under development. Freescale reserves the right to change or discontinue this product without notice. QorIQ P1020 Integrated Processor Product Brief Contents This document provides an overview of features and 1 Application Examples 2 functionality of the QorIQ P1020 integrated processor. 1.1 Dual-Core Device Application . 2 The P1020 combines dual Power Architecture e500v2 1.2 High-Performance Communication System 4 1.3 RAID Controller Application . 4 processor cores with system logic required for 1.4 SMB Gateway Application 5 networking, wireless infrastructure, and 1.5 WLAN Access Point Application . 5 telecommunications applications. 2 Features 6 2.1 Block Diagram . 6 2.2 Critical Performance Parameters 6 The P1020 offers an excellent combination of protocol 2.3 Chip-Level Features 6 and interface support including dual high-performance 2.4 Module Features . 8 CPU cores, an L2 cache, a DDR2/DDR3 memory 2.4.1 e500v2 Cores and Memory Unit . 8 2.4.2 e500 Coherency Module (ECM) and Address controller, three enhanced three-speed Ethernet Map . 8 controllers with support for SGMII and for 2.4.3 Integrated Security Engine (SEC 3.3.2) 9 IEEE Std 1588 precision time protocol for network 2.4.4 Enhanced Three-Speed Ethernet Controllers (eTSECs) . 9 synchronization over Ethernet, a TDM interface, two 2.4.5 Universal Serial Bus (USB) 2.0 . 10 USB 2.0 interface, an independent SD/MMC card 2.4.6 DDR SDRAM Controller . 11 2.4.7 High Speed I/O Interfaces . 12 controller (eSDHC), integrated system performance 2.4.8 Programmable Interrupt Controller (PIC) 12 monitor, and two PCI Express controllers. 2.4.9 Time Division Multiplexing (TDM) Interface 13 2.4.10 Enhanced Secure Digital Host Controller (eS- DHC) . 13 2 2.4.11 DMA, I C, DUART, and Enhanced Local Bus Controller (eLBC) 13 2.4.12 Device Boot Locations 14 2.4.13 System Performance Monitor . 14 3 Development Environment . 15 4 Document Revision History . 15 Freescale Semiconductor, Inc., 2008. All rights reserved. PreliminarySubject to Change Without NoticeApplication Examples 1 Application Examples The following section provides block diagrams of different P1020 applications. The P1020 is a very flexible device and can be configured to meet many system application needs. Both cores can operate in a symmetric multiprocessing mode to achieve higher performance, or they can run independent operating systems, each performing separate tasks. This flexibility enables application developers to assign distinct processing resources to distinct tasks that need guaranteed performance. For example, one core can manage a data plane and the other a control plane. The value proposition of a dual-core device is further enhanced by a high degree of peripheral integration of system controllers such as DDR controllers. A device with faster internal buses can entirely replace the system controller where a discrete processor without integration was used previously. 1.1 Dual-Core Device Application There are two main ways to map operating systems to the two P1020 cores: Symmetric multiprocessing Cooperative asymmetric multiprocessing Two copies of the same OS that are non-SMP enabled Two separate operating systems QorIQ P1020 Integrated Processor Product Brief, Rev. 0 2 PreliminarySubject to Change Without Notice Freescale Semiconductor