PCAL9554B PCAL9554C 2 Low-voltage 8-bit I C-bus and SMBus low power I/O port with interrupt, weak pull-up and Agile I/O Rev. 4 19 December 2014 Product data sheet 1. General description The PCAL9554B and PCAL9554C are a low-voltage 8-bit General Purpose Input/Output 2 (GPIO) expanders with interrupt and weak pull-up for I C-bus/SMBus applications. The 2 only difference between the PCAL9554B and PCAL9554C is their I C-bus fixed address, 2 allowing a larger number of the same device on the I C-bus with no chance of address conflicts. NXP I/O expanders provide a simple solution when additional I/Os are needed while keeping interconnections to a minimum, for example, in ACPI power switches, sensors, push buttons, LEDs, fan control, etc. In addition to providing a flexible set of GPIOs, the wide V range of 1.65 V to 5.5 V DD allows the PCAL9554B/PCAL9554C to interface with next-generation microprocessors and microcontrollers where supply levels are dropping down to conserve power. The PCAL9554B/PCAL9554C contains the PCA9554A register set of four 8-bit Configuration, Input, Output, and Polarity Inversion registers, and additionally, the PCAL9554B/PCAL9554C has Agile I/O, which are additional features specifically designed to enhance the I/O. These additional features are: programmable output drive strength, latchable inputs, programmable pull-up/pull-down resistors, maskable interrupt, interrupt status register, programmable open-drain or push-pull outputs. The PCAL9554B is a pin-for-pin replacement for the PCA9554, while the PCAL9554C replaces the PCA9554A, however both versions power-up with all I/O interrupted masked. This mask default allows for a board bring-up free of spurious interrupts at power-up. The PCAL9554B/PCAL9554C open-drain interrupt (INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed. INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data 2 on its ports without having to communicate via the I C-bus. Thus, the PCAL9554B or PCAL9554C can remain a simple slave device. The device outputs have 25 mA sink capabilities for directly driving LEDs while consuming low device current. 2 Three hardware pins (A0, A1, A2) select the fixed I C-bus address and allow up to eight 2 devices to share the same I C-bus/SMBus. The PCAL9554B and PCAL9554C differ only 2 in their base I C-bus addresses permitting a total of 16 of the same devices on the 2 I C-bus, minimizing the chance of address conflict, even in the most complex system.PCAL9554B PCAL9554C NXP Semiconductors 2 Low-voltage 8-bit I C-bus/SMBus low power I/O port 2. Features and benefits 2 I C-bus to parallel port expander Operating power supply voltage range of 1.65 V to 5.5 V Low standby current consumption: 1.5 A (typical at 5 V V ) DD 1.0 A (typical at 3.3 V V ) DD Schmitt-trigger action allows slow input transition and better switching noise immunity at the SCL and SDA inputs V =0.10 V (typical) hys DD 5 V tolerant I/Os Open-drain active LOW interrupt output (INT) 2 400 kHz Fast-mode I C-bus Internal power-on reset Power-up with all channels configured as inputs No glitch on power-up Latched outputs with 25 mA drive maximum capability for directly driving LEDs Latch-up performance exceeds 100 mA per JESD78, Class II ESD protection exceeds JESD22 2000 V Human Body Model (A114-A) 1000 V Charged-Device Model (C101) Packages offered: TSSOP16 and HVQFN16 2.1 Agile I/O features Pin to pin replacement for PCA9554 and PCA9554B, PCA9554A and PCA9554C with interrupts disabled at power-up Software backward compatible with PCA9554 and PCA9554B, PCA9554A and PCA9554C Output port configuration: bank selectable push-pull or open-drain output stages Interrupt status: read-only register identifies the source of an interrupt Bit-wise I/O programming features: Output drive strength: four programmable drive strengths to reduce rise and fall times in low capacitance applications Input latch: Input Port register values changes are kept until the Input Port register is read Pull-up/pull-down enable: floating input or pull-up/down resistor enable Pull-up/pull-down selection: 100 k pull-up/down resistor selection Interrupt mask: mask prevents the generation of the interrupt when input changes state PCAL9554B PCAL9554C All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 4 19 December 2014 2 of 42