SC16IS850L 2 Single UART with I C-bus/SPI interface, 128 bytes of transmit and receive FIFOs, IrDA SIR built-in support Rev. 2 18 July 2012 Product data sheet 1. General description 2 The SC16IS850L is a slave I C-bus/SPI interface to a single-channel high performance UART. It offers data rates up to 5 Mbit/s and guarantees low operating and sleeping current. The device comes in very small HVQFN24 and TSSOP24 packages, which makes it ideally suitable for handheld, battery operated applications. It also enables 2 seamless protocol conversion from I C-bus or SPI to and RS-232/RS-485 and are fully bidirectional. The SC16IS850L supports SPI clock speeds up to 12 Mbit/s, and it supports IrDA SIR up to 115.2 kbit/s. Its internal register set is backward-compatible with the widely used and widely popular 16C850. This allows the software to be easily written or ported from another platform. The SC16IS850L also provides additional advanced features such as auto hardware and software flow control, automatic RS-485 support, and software reset. This allows the software to reset the UART at any moment, independent of the hardware reset signal. 2. Features and benefits 2.1 General features Single full-duplex UART 2 Selectable I C-bus or SPI interface 1.8 V operation Industrial temperature range: 40 C to +85 C 128 bytes FIFO (transmitter and receiver) Fully compatible with industrial standard 16C450 and equivalent Baud rates up to 5 Mbit/s in 16 clock mode Auto hardware flow control using RTS/CTS Auto software flow control with programmable Xon/Xoff characters Single or double Xon/Xoff characters Automatic RS-485 support (automatic slave address detection) RS-485 driver direction control via RTS signal RS-485 driver direction control inversion Built-in IrDA encoder and decoder interface Supports IrDA SIR with speeds up to 115.2 kbit/s Software reset Transmitter and receiver can be enabled/disabled independent of each otherSC16IS850L NXP Semiconductors 2 Single UART with I C-bus/SPI interface Receive and Transmit FIFO levels Programmable special character detection Fully programmable character formatting 5-bit, 6-bit, 7-bit or 8-bit character Even, odd, or no parity 1 1, 1 , or 2 stop bits 2 Line break generation and detection Internal Loopback mode Sleep current less than 5 A at 1.8 V Industrial and commercial temperature ranges Available in HVQFN24 and TSSOP24 packages 2 2.2 I C-bus features 400 kbit/s maximum speed 2 Compliant with I C-bus Fast-mode (Fm) speed Slave mode only 2.3 SPI features Supports 12 Mbit/s maximum SPI clock speed Slave mode only SPI Mode 0 3. Applications Factory automation and process control Portable and battery operated devices Cellular data devices 4. Ordering information Table 1. Ordering information Type number Package Name Description Version SC16IS850LIBS HVQFN24 plastic thermal enhanced very thin quad flat package no leads SOT616-3 24 terminals body 4 4 0.85 mm SC16IS850LIPW TSSOP24 plastic thin shrink small outline package 24 leads body width 4.4 mm SOT355-1 SC16IS850L All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 18 July 2012 2 of 60