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SC28L202A1DGG,129

SC28L202A1DGG,129 electronic component of NXP

Datasheet
UART 2-CH 256byte FIFO 3V/5V 56-Pin TSSOP Tube

Manufacturer: NXP
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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3: USD 10.2972 ea
Line Total: USD 30.89

0 - Global Stock
MOQ: 3  Multiples: 3
Pack Size: 3
     
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INTEGRATED CIRCUITS SC28L202 Dual universal asynchronous receiver/transmitter (DUART) Product data sheet 2005 Nov 01 Supersedes data of 2004 Apr 16 Philips Semiconductors Product data sheet Dual universal asynchronous receiver/transmitter SC28L202 (DUART) DESCRIPTION . 1 FEATURES 1 ORDERING INFORMATION 2 PIN CONFIGURATIONS . 2 PIN CONFIGURATION FOR 80XXX BUS INTERFACE (INTEL) . 3 CONFIGURATION FOR 68XXX BUS INTERFACE (MOTOROLA) . 4 OVERALL DESCRIPTION . 5 BRIEF DESCRIPTION OF FUNCTIONAL BLOCKS . 5 Bus Interface . 5 Timing Circuits 5 I/O ports . 5 UARTs . 5 Transmitters and Receivers . 5 Character and Address Recognition 6 Flow Control 6 Test Modes and Software . 6 DETAILED DESCRIPTIONS . 6 Bus Interface . 6 Timing Circuit . 7 I/O Ports . 8 UART Operation . 8 Receiver Operation 9 Arbitrating Interrupt Structure 12 PROGRAMMING THE HOST INTERFACE . 17 REGISTER DESCRIPTION AND PROGRAMMING NOTE 18 Registers that control Global Properties of the 28L202 . 18 GCCR Global Configuration Control Register 18 GCCR(7:6) DACKN Assertion . 18 GCCR(5:3): Reserved 18 GCCR(2:1): Interrupt vector configuration . 18 GCCR(0): Interrupt Status Masking 18 SFSR A and B Special Feature & Status Register 19 SFSR(7:4) Reserved . 19 SFSR(3) Status of loop back error check 19 SFSR(0) Reserved 19 TRR Test and Revision Register . 19 TRR 7 Test 2 Enable 19 TRR 6:0 Chip Revision Code . 19 STCR Scan Test Control Register 19 SES System Enable Status Register, A and B . 19 EOS Enhanced Operation Status Register 19 UART Registers 20 These registers are generally concerned with formatting, transmitting and receiving data . 20 MR0 Mode Register 0, A and B 20 MR0 7 Fixed length Watchdog Timer 20 MR0 5:4 Tx interrupt fill level 20 MR0 3 FIFO Size 20 MR0 2:0 Legacy Baud Rate Group Selection 20 MR1 Mode Register 1, A and B 21 MR1 7 Receiver Request to Send (hardware flow control) . 21 MR1 6 Receiver interrupt control bit 1 . 21 MR1 5 Error Mode Select and sub modes 21 MR1 4:3 Parity Mode Select 21 MR1 2 Parity Type Select . 21 MR1 1:0 Bits per Character Select . 21 MR2 Mode Register 2, A and B 22 MR2 7:6 Mode Select 22 MR2 7:6 = b00 Normal Mode . 22 MR2 7:6 = b01 Automatic Echo . 22 MR2 7:6 = b10 selects local loop back diagnostic mode. In this mode: . 22 MR2 7:6 = b11 Selects the Remote Loop back diagnostic mode. In this mode: 22 MR2 5 Transmitter Request to Send Control 22 MR2 4 Clear to Send Control . 22 MR2 3:0 Stop Bit Length Select . 22 i 2005 Nov 01

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
FR9
Freescale
FREESCALE SEMI
Freescale Semicon
FREESCALE SEMICONDUC
Freescale Semiconductor
Freescale Semiconductor - NXP
NXP
NXP Freescale
NXP (FREESCALE)
NXP / Freescale
NXP SEMI
NXP Semicon
NXP SEMICONDUCTOR
NXP Semiconductors
NXP USA Inc.
PH3
PHI

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