TFT3P5581-T

NXP Semiconductors IMX7ULPCEC Data Sheet: Technical Data Rev. 0, 06/2019 i.MX 7ULP Applications MCIMX7U5DVP07SC MCIMX7U5DVK07SC ProcessorConsumer Products MCIMX7U3DVK07SC The i.MX 7ULP product family members are optimized for power- sensitive applications benefiting from NXP s Heterogeneous Multicore Processing (HMP) architecture. Achieving an efficient balance between processing power and deterministic processing needs, the i.MX 7ULP is an asymmetric processor consisting of two separate processing domains: an application domain and a real-time domain. The application domain is built around an ARM Cortex-A7 processor with an ARM NEON SIMD engine and floating point unit (FPU) and is optimized for rich OS based applications. The real-time domain is built around an ARM Plastic packages: BGA 14x14mm, 0.5mm pitch, Cortex-M4 processor (with FPU) optimized for lowest possible and BGA 10 x 10 mm, 0.5 mm pitch leakage. Both domains are completely independent, with separate power, clocking, and peripheral domains, but the bus fabric of each domain is tightly integrated for efficient communication. The part is streamlined to minimize pin count, enabling small packages and simple system integration. i.MX 7ULP features Feature type Application processor domain Real-time processor domain ARM Processor Cortex-A7 Cortex-M4 Nominal (RUN) frequency: 500 MHz Maximum frequency: 200 MHz Overdrive (HSRUN) frequency: 720 Very Low Power Run (VLPR) MHz frequency: 48 MHz Very Low Power Run (VLPR) Optimized for lowest leakage current frequency: 48 MHz 32 KB instruction and data caches FPU 256 KB L2 cache MPU NEON SIMD engine FPU On-chip memory 256 KB of RAM 256 KB of tightly coupled RAM allocated into 32 KB switchable blocks 8 KB of OTP memory External memory 16/32-bit LPDDR2/LPDDR3 interface Serial flash interface supporting x4 and x8 interfaces running at 380 MHz IOs eMMC 5.0 interface Security Secure boot Secure boot Table continues on the next page... NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products.i.MX 7ULP features (continued) Feature type Application processor domain Real-time processor domain Signing and encrypt/decrypt engines Encrypt/decrypt engines (LTC) (CAAM) Simple tamper detection Serial peripherals Four I2C Fast mode plus Four I2C Fast mode plus SD 3.0/MMC 5.0 FlexI/O Four UARTs with flow control Four UARTs with flow control Two LPSPI peripherals Two LPSPI peripherals Timers Four 32-bit general-purpose timers with Four 32-bit general purpose-timers with capture and compare one 64-bit timer capture and compare one 64-bit timer Watchdog timer Watchdog timer 2 i.MX 7ULP Applications ProcessorConsumer Products, Rev. 0, 06/2019 NXP Semiconductors